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[BMG] batched-flash-attn 35% performance regression after PyTorch pin update (23b1588→98bf8ee)

performance

Status: Open.

#7880 In intel/intel-xpu-backend-for-triton;

· whitneywhtsang opened on Aug 31, 2026

[Inductor] test/inductor/test_torchinductor_dynamic_shapes.py DynamicShapesGPUTests.test_large_block_sizes_dynamic_shapes_xpu is broken

tests: torchinductor

upstream: pytorch

Status: Open.

Bug

#7875 In intel/intel-xpu-backend-for-triton;

· anmyachev opened on Aug 28, 2026

·  

[PT 2.15]

[vLLM] Update vllm pin

vllm

Status: Open.

#7871 In intel/intel-xpu-backend-for-triton;

· quinnlp opened on Aug 28, 2026

[Regression] triton-xpu 3.7.1 -> 3.7.2: batch_norm fused kernel slowdown on PVC

performance

tests: e2e

upstream: pytorch

Status: Open.

Bug

#7863 In intel/intel-xpu-backend-for-triton;

· msnliu opened on Aug 27, 2026

·  

[PT 2.15]

[BMG] INT8 tl.dot FMA path produces incorrect results for some blocked layout configs

Status: Open.

#7854 In intel/intel-xpu-backend-for-triton;

· sarah12121212 opened on Aug 26, 2026

Switch to C++20

Status: Open.

Task

#7850 In intel/intel-xpu-backend-for-triton;

· anmyachev opened on Aug 26, 2026

[BMG] AnnotateCacheControl costs 1.58x on pyhpc_isoneutral_mixing when predicated load is disabled

codegen: cache-controlCache policy annotation, eviction/cache hints, LSC cache modes.Cache policy annotation, eviction/cache hints, LSC cache modes.

hw: bmg

performance

tests: e2e

Status: Open.

#7843 In intel/intel-xpu-backend-for-triton;

· whitneywhtsang opened on Aug 25, 2026

[Benchmarks] Enable triton_kernels_benchmark tests to run on Nvidia device

benchmarks

performance

Status: Open.

Feature

#7837 In intel/intel-xpu-backend-for-triton;

· dudilester opened on Aug 25, 2026

[Agama][vLLM] Agama 39122.14 vLLM benchmark regressions

vllm

Status: Open.

#7834 In intel/intel-xpu-backend-for-triton;

· quinnlp opened on Aug 24, 2026

[Compiler] Study whether the auto-large-GRF rebuild threshold should be non-zero (allow some spilling at 128 GRF)

performance

research

Status: Open.

#7821 In intel/intel-xpu-backend-for-triton;

· etiotto opened on Aug 21, 2026

[LoopDistribute] Investigate a cost model to gate loop distribution

codegen: control-flowIssues involving scf.if, loops, worklist traversal, multi-definition flow, loop-invariant behavior.Issues involving scf.if, loops, worklist traversal, multi-definition flow, loop-invariant behavior.

performance

research

Status: Open.

#7820 In intel/intel-xpu-backend-for-triton;

· etiotto opened on Aug 21, 2026

[vLLM] Investigate vLLM Fused MoE XE-Forge speedup over Intel Triton

vllm

Status: Open.

#7817 In intel/intel-xpu-backend-for-triton;

· quinnlp opened on Aug 21, 2026

·  

5. Ecosystem enabling and performance