PR Digest 2026 08 27

PR Summary

Period: 2026-08-17 to 2026-08-27 | Total PRs: 33 (33 from Xe2/Xe3/Xe3P, 0 from Xe4) | Lines changed: +36,986 / -10,355

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Triton XPU BE (Xe2/Xe3/Xe3P) (33 PRs, +36,986 / -10,355)

The team hardened several correctness-critical compiler passes — fixing a dominance violation that broke causal flash attention, silent miscompiles in loop distribution, unsound mask drops, and a silent data-corruption bug in strided block I/O reshapes. New signedness-analysis infrastructure lays groundwork for converting signed division and remainder into faster unsigned operations under runtime assertions. Five upstream synchronizations were completed with pass rates ranging 99.26–99.35%.

Key accomplishments:

• Fixed a dominance violation that broke causal flash attention on BMG, plus several other correctness bugs in loop-distribution and mask-removal passes that could silently produce wrong results
• Fixed a silent data-corruption bug in strided 2D block I/O reshapes affecting int8/fp16 workloads
• Improved DPAS matmul acceleration to gracefully fall back to standard FMA execution for small matrix shapes instead of rejecting them outright
• Added new signedness-analysis infrastructure to support future division/remainder speedups
• Maintained alignment with the upstream Triton compiler (99.26–99.35% pass rate across five syncs)

Memory Access & Lowering

Fixes and refinements to 2D block I/O tile selection, predicated loads, and elementwise fp8 lowering.

• #7848 [MaterializeBlockPointer] Decline block IO when the mask degenerates the 2D block tile — Adds a maskPermitsBlockTile guard so masked loads that would collapse to single-row block tiles fall back to predicated loads instead. (+100/-0, @whitneywhtsang)
• #7803 MaterializeBlockPointer: Fix 1D reshape block I/O tile geometry for W > threadsPerWarp — Fixes silent wrong-data corruption in strided 1D-to-2D block I/O reshapes when tile width exceeds threads-per-warp. (+341/-111, @NathanVoldman)
• #7797 [HostTensorDescriptor] Cap shape divisibility specialization at 4 — Caps shape divisibility specialization since higher divisibilities provide no additional 2D block I/O benefit. (+46/-19, @whitneywhtsang)
• #7793 [HostTensorDescriptor] Use max divisibility for bounded specialization — Bounds JIT specialization from host tensor descriptors by encoding max power-of-2 shape divisibility instead of exact shape values. (+258/-55, @whitneywhtsang)
• #7775 [ElementwiseOpToLLVM] Rewrite fp8e4m3 -> fp16 with oneDNN sequence — Replaces the fp8e4m3-to-fp16 software converter with oneDNN's shorter instruction sequence. (+182/-101, @etiotto)
• #7772 [ElementwiseOpToLLVM] Propagate Inf/NaN in fp8e4m3 / fp8e5m2 -> bf16 conversion — Fixes reserved fp8 encodings that were decoding to finite values instead of NaN/Inf. (+170/-52, @etiotto)
• #7842 [TritonGENToLLVM] Declare predicated load as reading only argument memory — Declares predicated loads as read-only so LLVM/IGC can eliminate, hoist, or reorder them. (+16/-3, @whitneywhtsang)

Analysis & Correctness

Bug fixes in compiler passes and analyses that could silently produce wrong results, plus new sign-analysis infrastructure.

• #7844 [ReduceVariableLiveness] Fix dominance violation on multi-loop kernels — Fixes a dominance violation that broke causal flash attention on BMG by only rewiring uses the rematerialized copy actually dominates. (+129/-6, @etiotto)
• #7751 [LoopDistribute] Fix silent miscompiles, crash, and dropped loop attributes — Replaces an ad-hoc backward-slice walker with mlir::getBackwardSlice and explicit op classification, fixing frozen loop-carried values, a crash, and silent deletion of unrecognized ops. (+1214/-38, @etiotto)
• #7804 [LoopDistribute] Allow carried chains that depend on a single accumulator — Gives each loop-carried iter_arg an owning accumulator instead of rejecting any chain that reads a dot accumulator. (+731/-127, @etiotto)
• #7791 [RemoveMasks] Fix crashes and unsound mask drops — Fixes six defects in TritonIntelRemoveMasks including null-pointer crashes and mask drops that didn't match the loop's actual upper bound. (+447/-43, @etiotto)
• #7786 [RemoveLayoutConversions] Price sub-group-shuffle converts at register rate — Fixes the cost model overcharging sub-group-shuffle layout conversions at the shared-memory round-trip rate. (+228/-44, @etiotto)
• #7752 [AxisInfo] Clamp remainder divisibility to the result contiguity — Fixes an unsound divisibility deduction for the remainder operator when dividend contiguity exceeds result contiguity. (+49/-1, @whitneywhtsang)
• #7841 [vLLM] tl.dot: Previously rejected small N/small K DPAS shapes fallback to FMA — Lets DPAS matmul shapes too small for hardware acceleration fall back to blocked-layout FMA execution instead of erroring. (+99/-24, @sarah12121212)
• #7776 [vLLM][MoE] Update kernel grid to use autotune selected BLOCK_M and BLOCK_N values — Fixes MoE accuracy failures caused by launching the grid with vLLM's config values instead of the autotuner's chosen tile sizes. (+6/-16, @sarah12121212)
• #7853 Disable SPV_INTEL_int4 extension — Disables an experimental SPIR-V extension that broke vLLM's mamba tests. (+1/-20, @dev-tomek)
• #7822 Speculate signed div/rem into unsigned under a runtime assertion — Adds a new TTIR pass converting signed division/remainder to unsigned under a runtime non-negativity assertion. (+832/-0, @whitneywhtsang)
• #7808 [Analysis] Add SignedDivRemDeduction utility — Adds a utility identifying signed div/rem ops where AxisInfo deductions would apply if the dividend were proven non-negative. (+272/-0, @whitneywhtsang)
• #7807 [Analysis] Add SignednessProver analysis — Adds a goal-directed prover establishing sign properties of values via IntegerRangeAnalysis, infrastructure for future runtime-assertion-based optimizations. (+914/-0, @whitneywhtsang)
• #7847 [SimplifySignedArithmetic] Leverage range analysis — Queries IntegerRangeAnalysis first when checking whether a value is non-negative or strictly positive. (+175/-2, @whitneywhtsang)
• #7801 [XPU] Read the core clock rate from the target properties only — Removes a driver-dependent fallback from the driver-free compile-target parsing path. (+1/-8, @wdziurdz)

Upstream Alignment

5 upstream merges from OpenAI Triton (commits 4313a23, 1d2da15, 63068fc, 800558f, faa8c28) — pass rate 99.26–99.35%.

Test & CI Reliability

vLLM test-suite additions, CI workflow fixes, and benchmark/build infrastructure changes.

• #7851 Add UT for issue #7491 — Adds a unit test reproducing issue #7491. (+18/-0, @anmyachev)
• #7835 [vLLM] Report environment details before benchmarks — Records driver/GPU/compiler version metadata into the benchmark-reports artifact so environment differences can be compared across runs. (+18/-0, @quinnlp)
• #7825 Add platform selection logic to on-label workflow — Adds bmg-only/pvc-only labels and centralizes benchmark platform selection logic. (+49/-11, @whitneywhtsang)
• #7823 Add DLE_VERSION capture and output to capture-hw-details.sh — Captures DLE_VERSION in the hardware-details reporting script. (+7/-0, @exolyr)
• #7810 [CI] Fix on-label workflow canceling runs when multiple benchmark labels are added — Fixes a concurrency-group collision that let a second benchmark label cancel the first label's workflow run. (+12/-12, @whitneywhtsang)
• #7769 [vLLM] Add PR path change triggers to vLLM test workflows — Adds path-based triggers so vLLM test workflows run on relevant PR changes. (+18/-2, @quinnlp)
• #7766 [vLLM] Update pin to 017e9f4448b700e85ee16023287b025693c72b9e — Updates the vLLM pin with no benchmark performance impact. (+63/-32, @quinnlp)
• #7744 [vLLM] Add fused_moe tests to the vllm-tdesc test-suite — Adds fused_moe test coverage to the tensor-descriptor vLLM test suite. (+422/-5, @quinnlp)
• #7741 [vLLM] Add batched_moe tests to the vllm-tdesc test-suite — Adds batched_moe test coverage, applying all enabled kernel patches before running. (+79/-21, @quinnlp)
• #7670 [Launcher] Re-land event-less kernel submission — Re-lands event-less kernel launch submission with LTS-driver gating for device_assert/tl.device_print support. (+104/-23, @mieshkiwrk)
• #7630 Split Windows build — Splits the Windows build step so it can run on CPU-only machines. (+113/-20, @kwasd)