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[WIP] Switching from Synlig to Yosys-Slang #3181

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3 changes: 3 additions & 0 deletions .gitmodules
Original file line number Diff line number Diff line change
Expand Up @@ -13,3 +13,6 @@
[submodule "libs/EXTERNAL/yosys"]
path = libs/EXTERNAL/yosys
url = https://github.com/YosysHQ/yosys.git
[submodule "libs/EXTERNAL/yosys-slang"]
path = libs/EXTERNAL/yosys-slang
url = https://github.com/povik/yosys-slang.git
5 changes: 3 additions & 2 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -56,7 +56,8 @@ option(ODIN_SANITIZE "Enable building odin with sanitize flags" OFF)

# Allow the user to enable building Yosys
option(WITH_PARMYS "Enable Yosys as elaborator and parmys-plugin as partial mapper" ON)
option(SYNLIG_SYSTEMVERILOG "Enable building and installing Synlig SystemVerilog and UHDM plugins" OFF)
#option(SYNLIG_SYSTEMVERILOG "Enable building and installing Synlig SystemVerilog and UHDM plugins" OFF)
option(SLANG_SYSTEMVERILOG "Enable building and installing Yosys-Slang plugin for parsing SystemVerilog" OFF)

set(VTR_VERSION_MAJOR 9)
set(VTR_VERSION_MINOR 0)
Expand Down Expand Up @@ -438,7 +439,7 @@ if(${WITH_ODIN})
endif()

# handle cmake params to compile Yosys SystemVerilog/UHDM plugins
if(${SYNLIG_SYSTEMVERILOG})
if(${SLANG_SYSTEMVERILOG})
# avoid compiling plugins in case the Parmys frontend is not active
if(NOT ${WITH_PARMYS})
message(SEND_ERROR "Utilizing SystemVerilog/UHDM plugins requires activating Parmys frontend. Please set WITH_PARMYS.")
Expand Down
30 changes: 16 additions & 14 deletions doc/src/vtr/run_vtr_flow.rst
Original file line number Diff line number Diff line change
Expand Up @@ -73,15 +73,12 @@ The parser for these runs is considered the Yosys conventional Verilog/SystemVer

.. code-block:: bash

# Using the Synlig System_Verilog tool if installed, otherwise the Yosys conventional Verilog parser
./run_vtr_flow <path/to/SystemVerilog/File> <path/to/arch/file> -parser system-verilog

# Using the Surelog plugin if installed, otherwise failure on the unsupported file type
./run_vtr_flow <path/to/UHDM/File> <path/to/arch/file> -parser surelog
# Using the Yosys-Slang plugin for Yosys, otherwise the Yosys conventional Verilog parser
./run_vtr_flow <path/to/SystemVerilog/File> <path/to/arch/file> -parser slang

Running the default VTR flow using the Parmys standalone front-end.
The Synlig HDL parser supports the (i.e., ``read_systemverilog``) and (i.e., ``read_uhdm``) commands. It utilizes Surelog for SystemVerilog 2017 processing and Yosys for synthesis.
Enable Synlig tool with the ``-DSYNLIG_SYSTEMVERILOG=ON`` compile flag for the Parmys front-end.
Will run the VTR flow (default configuration) with Yosys-Slang plugin for Yosys frontend using Parmys plugin as partial mapper.
The Yosys-Slang SystemVerilog parser supports the (i.e., ``read_slang``) command. Yosys-Slang builds on top of the slang library to provide comprehensive SystemVerilog support.
Enable the Yosys-Slang plugin with the ``-DSLANG_SYSTEMVERILOG=ON`` compile flag for the Parmys front-end.

.. code-block:: bash

Expand Down Expand Up @@ -260,19 +257,24 @@ Detailed Command-line Options

.. option:: -parser <PARSER>

Specify a parser for the Yosys synthesizer [default (Verilog-2005), surelog (UHDM), system-verilog].
Specify a parser for the Yosys synthesizer [default (Verilog-2005), slang (SystemVerilog)].
The script uses the default conventional Verilog parser if this argument is not used.

**Default:** default

.. note::

Universal Hardware Data Model (UHDM) is a complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener.
UHDM is used as a compiled interchange format in between SystemVerilog tools. Typical inputs to the UHDM flow are files with ``.v`` or ``.sv`` extensions.
The ``system-verilog`` parser, which represents the ``read_systemverilog`` command, reads SystemVerilog files directly in Yosys.
It executes Surelog with provided filenames and converts them (in memory) into UHDM file. Then, this UHDM file is converted into Yosys AST. `[Yosys-SystemVerilog] <https://github.com/antmicro/yosys-systemverilog#usage>`_
On the other hand, the ``surelog`` parser, which uses the ``read_uhdm`` Yosys command, walks the design tree and converts its nodes into Yosys AST nodes using Surelog. `[UHDM-Yosys <https://github.com/chipsalliance/UHDM-integration-tests#uhdm-yosys>`_, `Surelog] <https://github.com/chipsalliance/Surelog#surelog>`_
Yosys-Slang is a Yosys plugin that is built on top of the slang library to provide comprehensive SystemVerilog support.
It supports the ``read_slang`` command, used with the ``-C`` command-line option to read include-files from a text file containing include-file names.
It is used to read SystemVerilog files directly in Yosys.
For more information on Yosys-Slang, see `[Yosys-Slang] <https://github.com/povik/yosys-slang.git>`_

.. note::

Parmys is a Yosys plugin which provides intelligent partial mapping features (inference, binding, and hard/soft logic trade-offs) from Odin-II for Yosys. For more information on available paramters see the `Parmys <https://github.com/CAS-Atlantic/parmys-plugin.git>`_ plugin page.

.. Universal Hardware Data Model (UHDM) is a complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener.
.. UHDM is used as a compiled interchange format in between SystemVerilog tools. Typical inputs to the UHDM flow are files with ``.v`` or ``.sv`` extensions.
.. The ``system-verilog`` parser, which represents the ``read_systemverilog`` command, reads SystemVerilog files directly in Yosys.
.. It executes Surelog with provided filenames and converts them (in memory) into UHDM file. Then, this UHDM file is converted into Yosys AST. `[Yosys-SystemVerilog] <https://github.com/antmicro/yosys-systemverilog#usage>`_
.. On the other hand, the ``surelog`` parser, which uses the ``read_uhdm`` Yosys command, walks the design tree and converts its nodes into Yosys AST nodes using Surelog. `[UHDM-Yosys <https://github.com/chipsalliance/UHDM-integration-tests#uhdm-yosys>`_, `Surelog] <https://github.com/chipsalliance/Surelog#surelog>`_
189 changes: 110 additions & 79 deletions libs/EXTERNAL/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -84,92 +84,123 @@ if (${WITH_PARMYS})

add_custom_target(yosys ALL DEPENDS ${YOSYS_BUILD_DIR})

if (${SYNLIG_SYSTEMVERILOG})

set(SURELOG_SOURCE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/Surelog)
set(SURELOG_BINARY_DIR ${SURELOG_SOURCE_DIR}/build)
set(YOSYS_F4PGA_PLUGINS_SOURCE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/yosys-f4pga-plugins)

ExternalProject_Add(surelog
# root directory for Surelog project
PREFIX "surelog"

GIT_REPOSITORY https://github.com/chipsalliance/Surelog.git
GIT_TAG v1.71
GIT_PROGRESS TRUE
GIT_SHALLOW TRUE

# setting source, build and install directories
SOURCE_DIR "${SURELOG_SOURCE_DIR}"
BUILD_IN_SOURCE FALSE
INSTALL_DIR "${SURELOG_BINARY_DIR}"

# define Surelog cache values
CMAKE_CACHE_ARGS
"-DCMAKE_BUILD_TYPE:STRING=Release"
"-DCMAKE_INSTALL_PREFIX:PATH=${CMAKE_BINARY_DIR}"
"-DCMAKE_POSITION_INDEPENDENT_CODE:BOOL=ON"
"-DCMAKE_WARN_DEPRECATED:BOOL=OFF"

# redirect logs to a logfile
LOG_BUILD ON
LOG_UPDATE ON
LOG_INSTALL ON
LOG_CONFIGURE OFF
LOG_OUTPUT_ON_FAILURE ON

# dependency
DEPENDS yosys
)

# Synlig integration (manages Surelog and UHDM internally)

# Synlig integration (manages Surelog and UHDM internally)
set(SYNLIG_SOURCE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/synlig)

# Clone Synlig repository and ensure submodules are synced before building
ExternalProject_Add(synlig
PREFIX "synlig"

# Clone the Synlig repository
GIT_REPOSITORY https://github.com/chipsalliance/synlig.git
GIT_TAG main
GIT_PROGRESS TRUE
GIT_SHALLOW TRUE
if (${SLANG_SYSTEMVERILOG})
set(SLANG_SRC_DIR ${CMAKE_CURRENT_SOURCE_DIR}/yosys-slang)
set(SLANG_BUILD_DIR ${CMAKE_BINARY_DIR}/yosys-slang)
set(YOSYS_CONFIG_EXECUTABLE ${CMAKE_BINARY_DIR}/bin/yosys-config CACHE STRING "Path to the yosys-config helper" FORCE)
execute_process(
COMMAND git submodule update --init
WORKING_DIRECTORY ${SLANG_SRC_DIR}
)
execute_process(
COMMAND ${GIT_EXECUTABLE} submodule foreach --recursive git\ submodule\ update\ --init
WORKING_DIRECTORY ${SLANG_SRC_DIR}
)
set(SLANG_FE "${SLANG_SRC_DIR}/src/slang_frontend.cc")
ExternalProject_Add(
yosys-slang
SOURCE_DIR ${SLANG_SRC_DIR}
BINARY_DIR ${SLANG_BUILD_DIR}

PATCH_COMMAND
${CMAKE_COMMAND} -E echo "Patching slang_frontend.cc to disable UndrivenPass" &&
${CMAKE_COMMAND} -DIN=${SLANG_FE} -P ${CMAKE_CURRENT_SOURCE_DIR}/patch_slang.cmake


CONFIGURE_COMMAND
${CMAKE_COMMAND} -DCMAKE_BUILD_TYPE=Release
-DYOSYS_CONFIG=${YOSYS_CONFIG_EXECUTABLE}
${SLANG_SRC_DIR}

BUILD_COMMAND ${CMAKE_COMMAND} --build ${SLANG_BUILD_DIR} -- -j${PROCESSOR_COUNT}
INSTALL_COMMAND ${CMAKE_COMMAND} --install ${SLANG_BUILD_DIR}
DEPENDS yosys
)

# Set source and build directories
SOURCE_DIR "${SYNLIG_SOURCE_DIR}"
BUILD_IN_SOURCE FALSE
INSTALL_DIR " "
# set(SURELOG_SOURCE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/Surelog)
# set(SURELOG_BINARY_DIR ${SURELOG_SOURCE_DIR}/build)
# set(YOSYS_F4PGA_PLUGINS_SOURCE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/yosys-f4pga-plugins)

# ExternalProject_Add(surelog
# # root directory for Surelog project
# PREFIX "surelog"

# GIT_REPOSITORY https://github.com/chipsalliance/Surelog.git
# GIT_TAG v1.71
# GIT_PROGRESS TRUE
# GIT_SHALLOW TRUE

# # setting source, build and install directories
# SOURCE_DIR "${SURELOG_SOURCE_DIR}"
# BUILD_IN_SOURCE FALSE
# INSTALL_DIR "${SURELOG_BINARY_DIR}"

# # define Surelog cache values
# CMAKE_CACHE_ARGS
# "-DCMAKE_BUILD_TYPE:STRING=Release"
# "-DCMAKE_INSTALL_PREFIX:PATH=${CMAKE_BINARY_DIR}"
# "-DCMAKE_POSITION_INDEPENDENT_CODE:BOOL=ON"
# "-DCMAKE_WARN_DEPRECATED:BOOL=OFF"

# # redirect logs to a logfile
# LOG_BUILD ON
# LOG_UPDATE ON
# LOG_INSTALL ON
# LOG_CONFIGURE OFF
# LOG_OUTPUT_ON_FAILURE ON

# # dependency
# DEPENDS yosys
# )

# # Synlig integration (manages Surelog and UHDM internally)

# # Synlig integration (manages Surelog and UHDM internally)
# set(SYNLIG_SOURCE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/synlig)

# # Clone Synlig repository and ensure submodules are synced before building
# ExternalProject_Add(synlig
# PREFIX "synlig"

# # Clone the Synlig repository
# GIT_REPOSITORY https://github.com/chipsalliance/synlig.git
# GIT_TAG main
# GIT_PROGRESS TRUE
# GIT_SHALLOW TRUE

# # Set source and build directories
# SOURCE_DIR "${SYNLIG_SOURCE_DIR}"
# BUILD_IN_SOURCE FALSE
# INSTALL_DIR " "

# Sync submodules after cloning
# # Sync submodules after cloning


UPDATE_COMMAND git submodule update --init --recursive third_party/surelog
WORKING_DIRECTORY ${SYNLIG_SOURCE_DIR}
# UPDATE_COMMAND git submodule update --init --recursive third_party/surelog
# WORKING_DIRECTORY ${SYNLIG_SOURCE_DIR}

BUILD_COMMAND ${MAKE_PROGRAM} -C ${SYNLIG_SOURCE_DIR} install DESTDIR=${CMAKE_BINARY_DIR}/bin/synlig_install -j${PROCESSOR_COUNT}
INSTALL_COMMAND ""
CONFIGURE_COMMAND ""
# BUILD_COMMAND ${MAKE_PROGRAM} -C ${SYNLIG_SOURCE_DIR} install DESTDIR=${CMAKE_BINARY_DIR}/bin/synlig_install -j${PROCESSOR_COUNT}
# INSTALL_COMMAND ""
# CONFIGURE_COMMAND ""

# Pass necessary paths and set environment variables
CMAKE_CACHE_ARGS
"-DCMAKE_BUILD_TYPE:STRING=Release"
"-DSURELOG_PATH=${CMAKE_BINARY_DIR}/surelog"
"-DYOSYS_PATH=${CMAKE_BINARY_DIR}/yosys"
"-DUHDM_INSTALL_DIR=${CMAKE_BINARY_DIR}"
"-DBUILD_DIR=${CMAKE_BINARY_DIR}/synlig-build"
"-DEXPORT_PATH=${CMAKE_BINARY_DIR}/synlig_install/usr/local/bin:$ENV{PATH}"
# # Pass necessary paths and set environment variables
# CMAKE_CACHE_ARGS
# "-DCMAKE_BUILD_TYPE:STRING=Release"
# "-DSURELOG_PATH=${CMAKE_BINARY_DIR}/surelog"
# "-DYOSYS_PATH=${CMAKE_BINARY_DIR}/yosys"
# "-DUHDM_INSTALL_DIR=${CMAKE_BINARY_DIR}"
# "-DBUILD_DIR=${CMAKE_BINARY_DIR}/synlig-build"
# "-DEXPORT_PATH=${CMAKE_BINARY_DIR}/synlig_install/usr/local/bin:$ENV{PATH}"

LOG_BUILD ON
LOG_UPDATE ON
LOG_INSTALL ON
LOG_CONFIGURE OFF
LOG_OUTPUT_ON_FAILURE ON

# Ensure dependencies like Yosys are built first
DEPENDS yosys # Ensure submodule sync runs before synlig build
)
# LOG_BUILD ON
# LOG_UPDATE ON
# LOG_INSTALL ON
# LOG_CONFIGURE OFF
# LOG_OUTPUT_ON_FAILURE ON

# # Ensure dependencies like Yosys are built first
# DEPENDS yosys # Ensure submodule sync runs before synlig build
# )

endif ()
endif ()
Expand Down
9 changes: 9 additions & 0 deletions libs/EXTERNAL/patch_slang.cmake
Original file line number Diff line number Diff line change
@@ -0,0 +1,9 @@
if(NOT DEFINED IN)
message(FATAL_ERROR "patch_slang.cmake: IN (SLANG_FE) variable not set.")
endif()
file(READ "${IN}" SLANG_FRONTEND_CONTENTS)
string(REPLACE "call(design, \"undriven\");" "// call(design, \"undriven\");" SLANG_PATCHED "${SLANG_FRONTEND_CONTENTS}")
if(NOT SLANG_FRONTEND_CONTENTS STREQUAL SLANG_PATCHED)
message(STATUS "Patching slang_frontend.cc to disable UndrivenPass")
file(WRITE "${IN}" "${SLANG_PATCHED}")
endif()
1 change: 1 addition & 0 deletions libs/EXTERNAL/yosys-slang
Submodule yosys-slang added at 76b83e
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