[BugFix][Engram] Support non-divisible SM90 block counts#2
Closed
JayceSu98 wants to merge 1 commit into
Closed
Conversation
The README declares SM90 GPUs as supported, but the Engram grad-w reduce kernel hard-coded four persistent batches and asserted that the persistent block count was divisible by four. That assumption is not true for all SM90 parts. For example, H100 PCIe exposes 114 SMs, so the CUDA/CuTeDSL full test path can fail before code generation reaches the actual kernel logic. Choose the largest batch count up to four that divides the persistent block count. This keeps the original four-batch layout when it is valid, while allowing other SM90 block counts to use the same persistent kernel shape without tripping the launch-time assertion. Co-authored-by: dingsg <shengge.ding@enflame-tech.com>
Owner
Author
|
Duplicate fork-local PR. The Engram fix is already tracked upstream as deepseek-ai#17. |
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
1 participant
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Context
TileKernels declares NVIDIA SM90 support, but
engram_grad_w_reduce_kernel.pyassumed the persistent block count can always be split into exactly four batches:That is not true for every supported SM90 GPU. H100 PCIe exposes 114 SMs, so a persistent-block count derived from the SM count can fail this assertion before the kernel reaches code generation or execution.
Fix
Choose the largest batch count in
[4, 3, 2, 1]that dividesnum_persistent_blocks.This preserves the original four-batch behavior whenever it is valid, while allowing other supported SM90 block counts to run with the same persistent reduction structure.
Why this is a TileKernels fix
The failure comes from a TileKernels launch-shape assumption, not from a backend-specific compiler issue. A supported SM90 device can have a valid SM count that is not divisible by four, so the kernel should pick a compatible batch split instead of rejecting the configuration.
Validation
Validated as part of the H100 PCIe CuTeDSL full correctness and benchmark run after the matching TileLang CuTeDSL fixes were applied.
Local sanity checks for this split branch:
git diff --check origin/main..74b4d17ruff checkon the changed TileKernels Python files