replaced t_clock_arch with std::shared_ptr<std::vector<t_clock_network>>

Author: SamuelHo10

libs/libarchfpga/src/arch_util.cpp

@@ -162,10 +162,6 @@ void free_arch(t_arch* arch) {
 
     vtr::free(arch->architecture_id);
 
-    if (arch->clocks) {
-        delete[] arch->clocks->clock_inf;
-    }
-
     delete (arch->noc);
 }
 

libs/libarchfpga/src/echo_arch.cpp

@@ -335,19 +335,19 @@ void PrintArchInfo(FILE* Echo, const t_arch* arch) {
     fprintf(Echo, "*************************************************\n");
     fprintf(Echo, "Clock:\n");
     if (arch->clocks) {
-        for (int i = 0; i < arch->clocks->num_global_clocks; i++) {
-            if (arch->clocks->clock_inf[i].autosize_buffer) {
-                fprintf(Echo, "\tClock[%d]: buffer_size auto C_wire %e", i + 1,
-                        arch->clocks->clock_inf->C_wire);
+        for (size_t i = 0; i < arch->clocks->size(); i++) {
+            if ((*arch->clocks)[i].autosize_buffer) {
+                fprintf(Echo, "\tClock[%zu]: buffer_size auto C_wire %e", i + 1,
+                        (*arch->clocks)[i].C_wire);
             } else {
-                fprintf(Echo, "\tClock[%d]: buffer_size %e C_wire %e", i + 1,
-                        arch->clocks->clock_inf[i].buffer_size,
-                        arch->clocks->clock_inf[i].C_wire);
+                fprintf(Echo, "\tClock[%zu]: buffer_size %e C_wire %e", i + 1,
+                        (*arch->clocks)[i].buffer_size,
+                        (*arch->clocks)[i].C_wire);
             }
             fprintf(Echo, "\t\t\t\tstat_prob %f switch_density %f period %e",
-                    arch->clocks->clock_inf[i].prob,
-                    arch->clocks->clock_inf[i].dens,
-                    arch->clocks->clock_inf[i].period);
+                    (*arch->clocks)[i].prob,
+                    (*arch->clocks)[i].dens,
+                    (*arch->clocks)[i].period);
         }
     }
 

libs/libarchfpga/src/physical_types.h

@@ -47,7 +47,6 @@
 #include "clock_types.h"
 
 //Forward declarations
-struct t_clock_arch;
 struct t_clock_network;
 struct t_power_arch;
 struct t_interconnect_pins;
@@ -411,12 +410,6 @@ struct t_grid_def {
 
 /************************* POWER ***********************************/
 
-/* Global clock architecture */
-struct t_clock_arch {
-    int num_global_clocks;
-    t_clock_network* clock_inf; /* Details about each clock */
-};
-
 /* Architecture information for a single clock */
 struct t_clock_network {
     bool autosize_buffer; /* autosize clock buffers */
@@ -426,6 +419,8 @@ struct t_clock_network {
     float prob;   /* Static probability of net assigned to this clock */
     float dens;   /* Switching density of net assigned to this clock */
     float period; /* Period of clock */
+
+    t_clock_network() = default;
 };
 
 /* Power-related architecture information */
@@ -2202,7 +2197,8 @@ struct t_arch {
     LogicalModels models;
 
     t_power_arch* power = nullptr;
-    t_clock_arch* clocks = nullptr;
+
+    std::shared_ptr<std::vector<t_clock_network>> clocks;
 
     //determine which layers in multi-die FPGAs require to build global routing resources
     std::vector<bool> layer_global_routing;

libs/libarchfpga/src/read_xml_arch_file.cpp

@@ -357,7 +357,7 @@ static void ProcessPower(pugi::xml_node parent,
                          t_power_arch* power_arch,
                          const pugiutil::loc_data& loc_data);
 
-static void ProcessClocks(pugi::xml_node Parent, t_clock_arch* clocks, const pugiutil::loc_data& loc_data);
+static void ProcessClocks(pugi::xml_node Parent, std::vector<t_clock_network>& clocks, const pugiutil::loc_data& loc_data);
 
 static void ProcessPb_TypePowerEstMethod(pugi::xml_node Parent, t_pb_type* pb_type, const pugiutil::loc_data& loc_data);
 static void ProcessPb_TypePort_Power(pugi::xml_node Parent, t_port* port, e_power_estimation_method power_method, const pugiutil::loc_data& loc_data);
@@ -527,15 +527,13 @@ void XmlReadArch(const char* ArchFile,
         Next = get_single_child(architecture, "clocks", loc_data, POWER_REQD);
         if (Next) {
             if (arch->clocks) {
-                ProcessClocks(Next, arch->clocks, loc_data);
+                ProcessClocks(Next, *arch->clocks, loc_data);
             } else {
                 /* This information still needs to be read, even if it is just
                  * thrown away.
                  */
-                t_clock_arch* clocks_fake = new t_clock_arch();
+                std::vector<t_clock_network> clocks_fake;
                 ProcessClocks(Next, clocks_fake, loc_data);
-                delete[] clocks_fake->clock_inf;
-                delete clocks_fake;
             }
         }
 
@@ -4712,32 +4710,26 @@ static void ProcessPower(pugi::xml_node parent,
 }
 
 /* Get the clock architecture */
-static void ProcessClocks(pugi::xml_node Parent, t_clock_arch* clocks, const pugiutil::loc_data& loc_data) {
+static void ProcessClocks(pugi::xml_node Parent, std::vector<t_clock_network>& clocks, const pugiutil::loc_data& loc_data) {
     pugi::xml_node Node;
     const char* tmp;
 
-    clocks->num_global_clocks = count_children(Parent, "clock", loc_data, ReqOpt::OPTIONAL);
+    int num_global_clocks = count_children(Parent, "clock", loc_data, ReqOpt::OPTIONAL);
 
-    /* Alloc the clockdetails */
-    clocks->clock_inf = nullptr;
-    if (clocks->num_global_clocks > 0) {
-        clocks->clock_inf = new t_clock_network[clocks->num_global_clocks];
-        memset(clocks->clock_inf, 0,
-               clocks->num_global_clocks * sizeof(t_clock_network));
-    }
+    clocks.resize(num_global_clocks, t_clock_network());
 
     /* Load the clock info. */
     Node = get_first_child(Parent, "clock", loc_data);
-    for (int i = 0; i < clocks->num_global_clocks; ++i) {
+    for (int i = 0; i < num_global_clocks; ++i) {
         tmp = get_attribute(Node, "buffer_size", loc_data).value();
         if (strcmp(tmp, "auto") == 0) {
-            clocks->clock_inf[i].autosize_buffer = true;
+            clocks[i].autosize_buffer = true;
         } else {
-            clocks->clock_inf[i].autosize_buffer = false;
-            clocks->clock_inf[i].buffer_size = (float)atof(tmp);
+            clocks[i].autosize_buffer = false;
+            clocks[i].buffer_size = (float)atof(tmp);
         }
 
-        clocks->clock_inf[i].C_wire = get_attribute(Node, "C_wire", loc_data).as_float(0);
+        clocks[i].C_wire = get_attribute(Node, "C_wire", loc_data).as_float(0);
 
         /* get the next clock item */
         Node = Node.next_sibling(Node.name());

vpr/src/base/SetupVPR.cpp

@@ -730,14 +730,16 @@ static void SetupPowerOpts(const t_options& Options, t_power_opts* power_opts, t
         if (!Arch->power)
             Arch->power = new t_power_arch();
 
-        if (!Arch->clocks)
-            Arch->clocks = new t_clock_arch();
+        if (!Arch->clocks) {
+            Arch->clocks = std::make_shared<std::vector<t_clock_network>>();
+        }
 
         device_ctx.clock_arch = Arch->clocks;
+
     } else {
         Arch->power = nullptr;
-        Arch->clocks = nullptr;
-        device_ctx.clock_arch = nullptr;
+        Arch->clocks.reset();
+        device_ctx.clock_arch.reset();
     }
 }
 

vpr/src/base/vpr_context.h

@@ -267,7 +267,7 @@ struct DeviceContext : public Context {
     /*******************************************************************
      * Clock Network
      ********************************************************************/
-    t_clock_arch* clock_arch;
+    std::shared_ptr<std::vector<t_clock_network>> clock_arch;
 
     /// @brief Name of rrgraph file read (if any).
     ///        Used to determine if the specified rr-graph file is already loaded,

vpr/src/power/power.cpp

@@ -81,7 +81,7 @@ static void power_usage_local_buffers_and_wires(t_power_usage* power_usage,
 
 /* Clock */
 static void power_usage_clock(t_power_usage* power_usage,
-                              t_clock_arch* clock_arch);
+                              std::vector<t_clock_network> clock_arch);
 static void power_usage_clock_single(t_power_usage* power_usage,
                                      t_clock_network* clock_inf);
 
@@ -192,8 +192,8 @@ static void power_usage_primitive(t_power_usage* power_usage, t_pb* pb, t_pb_gra
         Q_dens = pin_dens(pb, Q_pin, iblk);
         Q_prob = pin_prob(pb, Q_pin, iblk);
 
-        clk_prob = device_ctx.clock_arch->clock_inf[0].prob;
-        clk_dens = device_ctx.clock_arch->clock_inf[0].dens;
+        clk_prob = (*device_ctx.clock_arch)[0].prob;
+        clk_dens = (*device_ctx.clock_arch)[0].dens;
 
         power_usage_ff(&sub_power_usage, power_ctx.arch->FF_size, D_prob, D_dens,
                        Q_prob, Q_dens, clk_prob, clk_dens, power_ctx.solution_inf.T_crit);
@@ -645,36 +645,36 @@ static void power_usage_blocks(t_power_usage* power_usage) {
  * Calculates the total power usage from the clock network
  */
 static void power_usage_clock(t_power_usage* power_usage,
-                              t_clock_arch* clock_arch) {
-    int clock_idx;
+                              std::vector<t_clock_network> clock_arch) {
+    size_t clock_idx;
     auto& power_ctx = g_vpr_ctx.power();
 
     /* Initialization */
     power_usage->dynamic = 0.;
     power_usage->leakage = 0.;
 
     /* if no global clock, then return */
-    if (clock_arch->num_global_clocks == 0) {
+    if (clock_arch.empty()) {
         return;
     }
 
-    for (clock_idx = 0; clock_idx < clock_arch->num_global_clocks;
+    for (clock_idx = 0; clock_idx < clock_arch.size();
          clock_idx++) {
         t_power_usage clock_power;
 
         /* Assume the global clock is active even for combinational circuits */
-        if (clock_arch->num_global_clocks == 1) {
-            if (clock_arch->clock_inf[clock_idx].dens == 0) {
-                clock_arch->clock_inf[clock_idx].dens = 2;
-                clock_arch->clock_inf[clock_idx].prob = 0.5;
+        if (clock_arch.size() == 1) {
+            if (clock_arch[clock_idx].dens == 0) {
+                clock_arch[clock_idx].dens = 2;
+                clock_arch[clock_idx].prob = 0.5;
 
                 // This will need to change for multi-clock
-                clock_arch->clock_inf[clock_idx].period = power_ctx.solution_inf.T_crit;
+                clock_arch[clock_idx].period = power_ctx.solution_inf.T_crit;
             }
         }
         /* find the power dissipated by each clock network */
         power_usage_clock_single(&clock_power,
-                                 &clock_arch->clock_inf[clock_idx]);
+                                 &clock_arch[clock_idx]);
         power_add_usage(power_usage, &clock_power);
     }
 
@@ -1734,7 +1734,7 @@ e_power_ret_code power_total(float* run_time_s, const t_vpr_setup& vpr_setup, co
     power_component_add_usage(&sub_power_usage, POWER_COMPONENT_ROUTING);
 
     /* Clock  */
-    power_usage_clock(&sub_power_usage, arch->clocks);
+    power_usage_clock(&sub_power_usage, *arch->clocks);
     power_add_usage(&total_power, &sub_power_usage);
     power_component_add_usage(&sub_power_usage, POWER_COMPONENT_CLOCK);