Apply code review comment

Author: amin1377

doc/src/vpr/VIB.rst renamed to doc/src/VIB.rst

@@ -6,20 +6,20 @@ The VIB architecture adds modeling support for double-level MUX topology and ben
 
 Figure 1 shows the proposed VIB architecture which is tile-based. Each tile is composed of a CLB and a VIB. Each CLB can interact with the corresponding VIB which contains all the routing programmable switches in one tile. Figure 2 shows an example of the detailed interconnect architecture in VIB. The CLB input muxes and the driving muxes of wire segments can share the same fanins. A routing path of a net with two sinks is presented red in the Figure.
 
-.. figure:: ../Images/VIB.png
+.. figure:: Images/VIB.png
     :align: center 
     :height: 300
 
     Figure 1. VIB architecture. The connections between the inputs and outputs of the LB and the routing wires are all implemented within the VIB.
 
-.. figure:: ../Images/double-level.png
+.. figure:: Images/double-level.png
     :align: center
 
     Figure 2. Double-level MUX topology.
 
 Figure 3 shows the modeling for bent wires. A bent L-length wire is modeled as two segments in CHANX and CHANY respectively connected by a delayless switch. The orange and red arrows represent conterclockwise and clockwise bent wires respectively. The bent wires can connect to both bent and straight wire segments.
 
-.. figure:: ../Images/bent_wires.png
+.. figure:: Images/bent_wires.png
     :align: center
 
     Figure 3. Presentation for bent wires.
@@ -217,7 +217,7 @@ Here is a complete example of the ``<vib>`` tag:
 
 Its corresponding detailed architecture is shown in Figure 4.
 
-.. figure:: ../Images/vib_example.png
+.. figure:: Images/vib_example.png
     :align: center 
     :height: 600
 

doc/src/arch/reference.rst

@@ -2701,11 +2701,11 @@ Layout
 
   Technical details can be found in :cite:`XTang_FPT_2019`. 
 
-  .. note:: Strongly recommend to enable the tileable routing architecture when you want to PnR large FPGA fabrics, which can effectively reduce the runtime.
+  .. note:: It is strongly recommended to to enable the tileable routing architecture when you want to PnR large FPGA fabrics, which can effectively reduce the runtime.
 
 .. option:: through_channel="<bool>"
 
-  Allow routing channels to pass through multi-width and multi-height programable blocks. This is mainly used in heterogeneous FPGAs to increase routability, as illustrated in :numref:`fig_thru_channel`.
+  Allow routing channels to pass through multi-width and multi-height programmable blocks. This is mainly used in heterogeneous FPGAs to increase routability, as illustrated in :numref:`fig_thru_channel`.
   By default, it is ``false``.
 
   .. _fig_thru_channel:
@@ -3024,3 +3024,8 @@ A point to point connection can be applied in different ways than showed in the
 
     Point to point truth table
 
+VIB Architecture
+~~~~~~~~~~~~~~~~
+
+.. include:: VIB.rst
+

doc/src/vpr/index.rst

@@ -60,5 +60,3 @@ The purpose of VPR is to make the packing, placement, and routing stages of the
 
    file_formats
    debug_aids
-
-   VIB

libs/libarchfpga/src/read_xml_arch_file.cpp

@@ -5192,14 +5192,14 @@ static void process_vib(pugi::xml_node Vib_node, std::vector<t_physical_tile_typ
                            "No name specified for the vib seg group!\n");
         }
 
-        seg_group.axis = BOTH_DIR; /*DEFAULT value if no axis is specified*/
+        seg_group.axis = e_parallel_axis_vib::BOTH_DIR; /*DEFAULT value if no axis is specified*/
         tmp = get_attribute(Node, "axis", loc_data, ReqOpt::OPTIONAL).as_string("");
 
         if (!tmp.empty()) {
             if (tmp == "x") {
-                seg_group.axis = X;
+                seg_group.axis = e_parallel_axis_vib::X;
             } else if (tmp == "y") {
-                seg_group.axis = Y;
+                seg_group.axis = e_parallel_axis_vib::Y;
             } else {
                 archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), "Unsopported parralel axis type: %s\n", tmp);
             }

libs/libarchfpga/src/vib_inf.h

@@ -1,5 +1,4 @@
-#ifndef VIB_INF_H
-#define VIB_INF_H
+#pragma once
 
 #include <functional>
 #include <utility>
@@ -22,26 +21,32 @@
 #include "logic_types.h"
 #include "clock_types.h"
 
-//#include "physical_types.h"
-
-/* for vib tag */
-enum e_parallel_axis_vib {
+/**
+ * @brief The parallel axis of the VIB segment group.
+ */
+enum class e_parallel_axis_vib {
     X,
     Y,
     BOTH_DIR
 };
 
+/**
+ * @brief Segment group information.
+ */
 struct t_seg_group {
     std::string name;
     e_parallel_axis_vib axis;
     int seg_index;
     int track_num;
 };
 
-enum e_multistage_mux_from_or_to_type {
-    PB = 0,
-    SEGMENT,
-    MUX
+/**
+ * @brief The type of the from or to of the multistage mux.
+ */
+enum class e_multistage_mux_from_or_to_type {
+    PB = 0, //Physical block
+    SEGMENT, //Segment
+    MUX //MUX
 };
 
 struct t_from_or_to_inf {
@@ -270,5 +275,3 @@ class VibDeviceGrid {
      */
     vtr::NdMatrix<const VibInf*, 3> vib_grid_; //This stores the grid of complex blocks. It is a 3D matrix: [0..num_layers-1][0..grid.width()-1][0..grid_height()-1]
 };
-
-#endif

libs/librrgraph/src/base/rr_graph_builder.cpp

@@ -246,7 +246,6 @@ void RRGraphBuilder::set_node_ptc_nums(RRNodeId node, const std::string& ptc_str
 std::string RRGraphBuilder::node_ptc_nums_to_string(RRNodeId node) const {
     if (node_ptc_nums_.empty()) {
         return std::to_string(size_t(node_storage_.node_ptc_num(node)));
-//        VTR_LOG("Node ptc single: %d -> string %s\n", node_storage_.node_ptc_num(node), ret.c_str()); 
     }
     VTR_ASSERT(size_t(node) < node_ptc_nums_.size());
     if (node_ptc_nums_[node].empty()) {
@@ -300,8 +299,8 @@ void RRGraphBuilder::add_track_node_to_lookup(RRNodeId node) {
     VTR_ASSERT(size_t(std::max(node_storage_.node_xlow(node), node_storage_.node_xhigh(node))) == node_x.back());
     VTR_ASSERT(size_t(std::max(node_storage_.node_ylow(node), node_storage_.node_yhigh(node))) == node_y.back());
 
-    for (const size_t& x : node_x) {
-        for (const size_t& y : node_y) {
+    for (const size_t x : node_x) {
+        for (const size_t y : node_y) {
             size_t ptc = node_storage_.node_ptc_num(node);
             e_rr_type node_type = node_storage_.node_type(node);
             /* Routing channel nodes may have different ptc num 

libs/librrgraph/src/base/rr_graph_builder.h

@@ -193,10 +193,20 @@ class RRGraphBuilder {
         node_storage_.set_node_coordinates(id, x1, y1, x2, y2);
     }
 
+    /**
+     * @brief Set the bend start of a node
+     * @param id The node id
+     * @param bend_start The bend start
+     */
     inline void set_node_bend_start(RRNodeId id, size_t bend_start) {
         node_storage_.set_node_bend_start(id, bend_start);
     }
 
+    /**
+     * @brief Set the bend end of a node
+     * @param id The node id
+     * @param bend_end The bend end
+     */
     inline void set_node_bend_end(RRNodeId id, size_t bend_end) {
         node_storage_.set_node_bend_end(id, bend_end);
     }

libs/librrgraph/src/base/rr_graph_view.h

@@ -229,10 +229,21 @@ class RRGraphView {
     inline short node_layer(RRNodeId node) const {
         return node_storage_.node_layer(node);
     }
-
+    
+    /** 
+     * @brief Return the bend start of a specified node.
+     * @param node The node id
+     * @return The bend start
+     */
     inline short node_bend_start(RRNodeId node) const {
         return node_storage_.node_bend_start(node);
     }
+
+    /** 
+     * @brief Return the bend end of a specified node.
+     * @param node The node id
+     * @return The bend end
+     */
     inline short node_bend_end(RRNodeId node) const {
         return node_storage_.node_bend_end(node);
     }
@@ -446,6 +457,12 @@ class RRGraphView {
     inline RRNodeId edge_sink_node(RRNodeId id, t_edge_size iedge) const {
         return node_storage_.edge_sink_node(id, iedge);
     }
+
+    /**
+     * @brief Return the destination node for the specified edge.
+     * @param edge The edge id
+     * @return The destination node id
+     */
     inline RRNodeId edge_sink_node(RREdgeId edge) const {
         return node_storage_.edge_sink_node(edge);
     }
@@ -466,6 +483,12 @@ class RRGraphView {
     inline bool edge_is_configurable(RRNodeId id, t_edge_size iedge) const {
         return node_storage_.edge_is_configurable(id, iedge, rr_switch_inf_);
     }
+
+    /**
+     * @brief Check if the edge is a configurable edge
+     * @param edge The edge id
+     * @return True if the edge is configurable, false otherwise
+     */
     inline bool edge_is_configurable(RREdgeId edge) const {
         return node_storage_.edge_is_configurable(edge, rr_switch_inf_);
     }

libs/librrgraph/src/utils/vtr_tokenizer.h

@@ -1,5 +1,4 @@
-#ifndef VTR_TOKENIZER_H
-#define VTR_TOKENIZER_H
+#pragma once
 
 /********************************************************************
  * Include header files that are required by data structure declaration
@@ -66,5 +65,3 @@ class StringToken {
 };
 
 }  // namespace openfpga
-
-#endif

libs/libvtrutil/src/vtr_geometry.h

@@ -59,7 +59,6 @@ bool operator!=(const RectUnion<T>& lhs, const RectUnion<T>& rhs);
 template<class T>
 class Point {
   public: //Constructors
-    Point() {}
     Point(T x_val, T y_val) noexcept;
 
   public: //Accessors