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[vpr] apply code format rules to tileable RR Graph files
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8 files changed

+67
-32
lines changed

8 files changed

+67
-32
lines changed

libs/librrgraph/src/base/rr_graph_storage.cpp

Lines changed: 12 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -575,12 +575,12 @@ t_edge_size t_rr_graph_storage::num_non_configurable_edges(RRNodeId node, const
575575
}
576576

577577
bool t_rr_graph_storage::edge_is_configurable(RREdgeId edge, const vtr::vector<RRSwitchId, t_rr_switch_inf>& rr_switches) const {
578-
auto iswitch = edge_switch(edge);
578+
short iswitch = edge_switch(edge);
579579
return rr_switches[RRSwitchId(iswitch)].configurable();
580580
}
581581

582582
bool t_rr_graph_storage::edge_is_configurable(RRNodeId id, t_edge_size iedge, const vtr::vector<RRSwitchId, t_rr_switch_inf>& rr_switches) const {
583-
auto iswitch = edge_switch(id, iedge);
583+
short iswitch = edge_switch(id, iedge);
584584
return rr_switches[RRSwitchId(iswitch)].configurable();
585585
}
586586

@@ -715,7 +715,7 @@ static int get_node_mux_num(
715715
vtr::array_view_id<RRNodeId, const t_rr_node_data> node_storage,
716716
vtr::array_view_id<RRNodeId, const t_rr_node_ptc_data> node_ptc,
717717
RRNodeId id) {
718-
auto node_type = node_storage[id].type_;
718+
e_rr_type node_type = node_storage[id].type_;
719719
if (node_type != e_rr_type::MUX) {
720720
VTR_LOG_ERROR("Attempted to access RR node 'mux_num' for non-MUX type '%s'\n", rr_node_typename[node_type]);
721721
}
@@ -755,7 +755,7 @@ void t_rr_graph_storage::set_node_name(RRNodeId id, const std::string& new_name)
755755
node_name_.insert(std::make_pair(id, new_name));
756756
}
757757
void t_rr_graph_storage::set_node_coordinates(RRNodeId id, short x1, short y1, short x2, short y2) {
758-
auto& node = node_storage_[id];
758+
t_rr_node_data& node = node_storage_[id];
759759
if (x1 < x2) {
760760
node.xlow_ = x1;
761761
node.xhigh_ = x2;
@@ -782,7 +782,7 @@ void t_rr_graph_storage::set_node_bend_end(RRNodeId id, size_t bend_end) {
782782
}
783783

784784
void t_rr_graph_storage::set_node_cost_index(RRNodeId id, RRIndexedDataId new_cost_index) {
785-
auto& node = node_storage_[id];
785+
t_rr_node_data& node = node_storage_[id];
786786
if ((size_t)new_cost_index >= std::numeric_limits<decltype(node.cost_index_)>::max()) {
787787
VTR_LOG_ERROR("Attempted to set cost_index_ %zu above cost_index storage max value.\n",
788788
new_cost_index);
@@ -835,15 +835,19 @@ void t_rr_graph_storage::set_virtual_clock_network_root_idx(RRNodeId virtual_clo
835835
int t_rr_graph_view::node_ptc_num(RRNodeId id) const {
836836
return node_ptc_[id].ptc_.pin_num;
837837
}
838+
838839
int t_rr_graph_view::node_pin_num(RRNodeId id) const {
839840
return get_node_pin_num(node_storage_, node_ptc_, id);
840841
}
842+
841843
int t_rr_graph_view::node_track_num(RRNodeId id) const {
842844
return get_node_track_num(node_storage_, node_ptc_, id);
843845
}
846+
844847
int t_rr_graph_view::node_class_num(RRNodeId id) const {
845848
return get_node_class_num(node_storage_, node_ptc_, id);
846849
}
850+
847851
int t_rr_graph_view::node_mux_num(RRNodeId id) const {
848852
return get_node_mux_num(node_storage_, node_ptc_, id);
849853
}
@@ -889,7 +893,7 @@ void t_rr_graph_storage::reorder(const vtr::vector<RRNodeId, RRNodeId>& order,
889893

890894
// Reorder nodes
891895
for (size_t i = 0; i < node_storage_.size(); i++) {
892-
auto n = RRNodeId(i);
896+
RRNodeId n = RRNodeId(i);
893897
VTR_ASSERT(n == inverse_order[order[n]]);
894898
node_storage_[order[n]] = old_node_storage[n];
895899
}
@@ -905,8 +909,8 @@ void t_rr_graph_storage::reorder(const vtr::vector<RRNodeId, RRNodeId>& order,
905909
// Reorder edges by source node
906910
for (size_t i = 0; i < node_storage_.size(); i++) {
907911
node_first_edge_[RRNodeId(i)] = cur_edge;
908-
auto n = inverse_order[RRNodeId(i)];
909-
for (auto e = old_node_first_edge[n];
912+
RRNodeId n = inverse_order[RRNodeId(i)];
913+
for (RREdgeId e = old_node_first_edge[n];
910914
e < old_node_first_edge[RRNodeId(size_t(n) + 1)];
911915
e = RREdgeId(size_t(e) + 1)) {
912916
edge_src_node_[cur_edge] = order[old_edge_src_node[e]]; // == n?

libs/librrgraph/src/base/rr_graph_storage.h

Lines changed: 18 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -187,6 +187,7 @@ class t_rr_graph_storage {
187187
short node_bend_start(RRNodeId id) const {
188188
return node_bend_start_[id];
189189
}
190+
190191
short node_bend_end(RRNodeId id) const {
191192
return node_bend_end_[id];
192193
}
@@ -228,7 +229,7 @@ class t_rr_graph_storage {
228229
int node_pin_num(RRNodeId id) const; //Same as ptc_num() but checks that type() is consistent
229230
int node_track_num(RRNodeId id) const; //Same as ptc_num() but checks that type() is consistent
230231
int node_class_num(RRNodeId id) const; //Same as ptc_num() but checks that type() is consistent
231-
int node_mux_num(RRNodeId id) const; //Same as ptc_num() but checks that type() is consistent
232+
int node_mux_num(RRNodeId id) const; //Same as ptc_num() but checks that type() is consistent
232233

233234
/** @brief Retrieve fan_in for RRNodeId, init_fan_in must have been called first. */
234235
t_edge_size fan_in(RRNodeId id) const {
@@ -337,18 +338,18 @@ class t_rr_graph_storage {
337338
*
338339
* Only call these methods after partition_edges has been invoked.
339340
*/
340-
edge_idx_range edges(const RRNodeId& id) const {
341+
edge_idx_range edges(const RRNodeId id) const {
341342
return vtr::make_range(edge_idx_iterator(0), edge_idx_iterator(num_edges(id)));
342343
}
343344

344-
edge_idx_range configurable_edges(const RRNodeId& id, const vtr::vector<RRSwitchId, t_rr_switch_inf>& rr_switches) const {
345+
edge_idx_range configurable_edges(const RRNodeId id, const vtr::vector<RRSwitchId, t_rr_switch_inf>& rr_switches) const {
345346
return vtr::make_range(edge_idx_iterator(0), edge_idx_iterator(num_edges(id) - num_non_configurable_edges(id, rr_switches)));
346347
}
347-
edge_idx_range non_configurable_edges(const RRNodeId& id, const vtr::vector<RRSwitchId, t_rr_switch_inf>& rr_switches) const {
348+
edge_idx_range non_configurable_edges(const RRNodeId id, const vtr::vector<RRSwitchId, t_rr_switch_inf>& rr_switches) const {
348349
return vtr::make_range(edge_idx_iterator(num_edges(id) - num_non_configurable_edges(id, rr_switches)), edge_idx_iterator(num_edges(id)));
349350
}
350351

351-
t_edge_size num_edges(const RRNodeId& id) const {
352+
t_edge_size num_edges(const RRNodeId id) const {
352353
return size_t(last_edge(id)) - size_t(first_edge(id));
353354
}
354355
bool edge_is_configurable(RREdgeId edge, const vtr::vector<RRSwitchId, t_rr_switch_inf>& rr_switches) const;
@@ -363,7 +364,7 @@ class t_rr_graph_storage {
363364
*
364365
* If first_edge == last_edge, then a RRNodeId has no edges.
365366
*/
366-
RREdgeId first_edge(const RRNodeId& id) const {
367+
RREdgeId first_edge(const RRNodeId id) const {
367368
return node_first_edge_[id];
368369
}
369370

@@ -372,7 +373,7 @@ class t_rr_graph_storage {
372373
* we always allocate that dummy node. We also assume that the edges have
373374
* been sorted by rr_node, which is true after partition_edges().
374375
*/
375-
RREdgeId last_edge(const RRNodeId& id) const {
376+
RREdgeId last_edge(const RRNodeId id) const {
376377
return (&node_first_edge_[id])[1];
377378
}
378379

@@ -411,19 +412,19 @@ class t_rr_graph_storage {
411412
}
412413

413414
/** @brief Get the source node for the specified edge. */
414-
RRNodeId edge_src_node(const RREdgeId& edge) const {
415+
RRNodeId edge_src_node(const RREdgeId edge) const {
415416
VTR_ASSERT_DEBUG(edge.is_valid());
416417
return edge_src_node_[edge];
417418
}
418419

419420
/** @brief Get the destination node for the specified edge. */
420-
RRNodeId edge_sink_node(const RREdgeId& edge) const {
421+
RRNodeId edge_sink_node(const RREdgeId edge) const {
421422
VTR_ASSERT_DEBUG(edge.is_valid());
422423
return edge_dest_node_[edge];
423424
}
424425

425426
// Get the source node for the specified edge.
426-
RRNodeId edge_source_node(const RREdgeId& edge) const {
427+
RRNodeId edge_source_node(const RREdgeId edge) const {
427428
return edge_src_node_[edge];
428429
}
429430

@@ -440,17 +441,17 @@ class t_rr_graph_storage {
440441
* This method should generally not be used, and instead first_edge and
441442
* last_edge should be used.
442443
*/
443-
RRNodeId edge_sink_node(const RRNodeId& id, t_edge_size iedge) const {
444+
RRNodeId edge_sink_node(const RRNodeId id, t_edge_size iedge) const {
444445
return edge_sink_node(edge_id(id, iedge));
445446
}
446447

447448
// Get the source node for the iedge'th edge from specified RRNodeId.
448-
RRNodeId edge_source_node(const RRNodeId& id, t_edge_size iedge) const {
449+
RRNodeId edge_source_node(const RRNodeId id, t_edge_size iedge) const {
449450
return edge_source_node(edge_id(id, iedge));
450451
}
451452

452453
/** @brief Get the switch used for the specified edge. */
453-
short edge_switch(const RREdgeId& edge) const {
454+
short edge_switch(const RREdgeId edge) const {
454455
return edge_switch_[edge];
455456
}
456457

@@ -459,7 +460,7 @@ class t_rr_graph_storage {
459460
* This method should generally not be used, and instead first_edge and
460461
* last_edge should be used.
461462
*/
462-
short edge_switch(const RRNodeId& id, t_edge_size iedge) const {
463+
short edge_switch(const RRNodeId id, t_edge_size iedge) const {
463464
return edge_switch(edge_id(id, iedge));
464465
}
465466

@@ -791,8 +792,8 @@ class t_rr_graph_storage {
791792
*/
792793
static inline bool is_node_on_specific_side(
793794
vtr::array_view_id<RRNodeId, const t_rr_node_data> node_storage,
794-
const RRNodeId& id,
795-
const e_side& side) {
795+
const RRNodeId id,
796+
const e_side side) {
796797
auto& node_data = node_storage[id];
797798
if (node_data.type_ != e_rr_type::IPIN && node_data.type_ != e_rr_type::OPIN) {
798799
VTR_LOG_ERROR("Attempted to access RR node 'side' for non-IPIN/OPIN type '%s'",
@@ -1035,7 +1036,7 @@ class t_rr_graph_view {
10351036
int node_pin_num(RRNodeId id) const; //Same as ptc_num() but checks that type() is consistent
10361037
int node_track_num(RRNodeId id) const; //Same as ptc_num() but checks that type() is consistent
10371038
int node_class_num(RRNodeId id) const; //Same as ptc_num() but checks that type() is consistent
1038-
int node_mux_num(RRNodeId id) const; //Same as ptc_num() but checks that type() is consistent
1039+
int node_mux_num(RRNodeId id) const; //Same as ptc_num() but checks that type() is consistent
10391040

10401041
/**
10411042
* @brief Retrieve the fan-in for a given RRNodeId.

vpr/src/base/read_blif.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -695,7 +695,7 @@ bool is_real_param(const std::string& param) {
695695
}
696696

697697
/* The string must match the regular expression */
698-
static const std::regex real_number_expr("[+-]?([0-9]*\\.[0-9]+)|([0-9]+\\.[0-9]*)");
698+
const std::regex real_number_expr("[+-]?([0-9]*\\.[0-9]+)|([0-9]+\\.[0-9]*)");
699699
if (!std::regex_match(param, real_number_expr)) {
700700
return false;
701701
}

vpr/src/base/setup_vib_grid.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -100,7 +100,7 @@ static VibDeviceGrid build_vib_device_grid(const t_vib_grid_def& grid_def, size_
100100
FormulaParser p;
101101
std::set<const VibInf*> seen_types;
102102
for (int layer = 0; layer < num_layers; layer++) {
103-
for (const auto& grid_loc_def : grid_def.layers.at(layer).loc_defs) {
103+
for (const t_vib_grid_loc_def& grid_loc_def : grid_def.layers.at(layer).loc_defs) {
104104
//Fill in the block types according to the specification
105105
const VibInf* type = nullptr;
106106
for (size_t vib_type = 0; vib_type < device_ctx.arch->vib_infs.size(); vib_type++) {

vpr/src/base/setup_vpr.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1124,7 +1124,7 @@ static void process_from_or_to_tokens(const std::vector<std::string> Tokens, con
11241124
parse_pin_name(Token_char, &start_pin_index, &end_pin_index, pb_type_name, port_name);
11251125

11261126
std::vector<int> all_sub_tile_to_tile_pin_indices;
1127-
for (t_sub_tile& sub_tile : PhysicalTileTypes[i_phy_type].sub_tiles) {
1127+
for (const t_sub_tile& sub_tile : PhysicalTileTypes[i_phy_type].sub_tiles) {
11281128
int sub_tile_capacity = sub_tile.capacity.total();
11291129

11301130
int start = 0;

vpr/src/base/vpr_context.h

Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -179,7 +179,8 @@ struct DeviceContext : public Context {
179179
DeviceGrid grid;
180180

181181
/**
182-
* @brief The VIB device grid
182+
* @brief The VIB device grid. For details about this layout
183+
* refer to https://doi.org/10.1109/ICFPT59805.2023.00014
183184
*/
184185
VibDeviceGrid vib_grid;
185186

@@ -242,7 +243,16 @@ struct DeviceContext : public Context {
242243
/* A read-only view of routing resource graph to be the ONLY database
243244
* for client functions: GUI, placer, router, timing analyzer etc.
244245
*/
245-
RRGraphView rr_graph{rr_graph_builder.rr_nodes(), rr_graph_builder.node_lookup(), rr_graph_builder.rr_node_metadata(), rr_graph_builder.rr_edge_metadata(), rr_indexed_data, rr_rc_data, rr_graph_builder.rr_segments(), rr_graph_builder.rr_switch(), rr_graph_builder.node_in_edge_storage(), rr_graph_builder.node_ptc_storage()};
246+
RRGraphView rr_graph{rr_graph_builder.rr_nodes(),
247+
rr_graph_builder.node_lookup(),
248+
rr_graph_builder.rr_node_metadata(),
249+
rr_graph_builder.rr_edge_metadata(),
250+
rr_indexed_data,
251+
rr_rc_data,
252+
rr_graph_builder.rr_segments(),
253+
rr_graph_builder.rr_switch(),
254+
rr_graph_builder.node_in_edge_storage(),
255+
rr_graph_builder.node_ptc_storage()};
246256

247257
/* Track ids for each rr_node in the rr_graph.
248258
* This is used by drawer for tileable routing resource graph

vpr/src/base/vpr_types.h

Lines changed: 22 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1407,20 +1407,40 @@ struct t_det_routing_arch {
14071407
/// the CUSTOM switch block type. See comment at top of SRC/route/build_switchblocks.c
14081408
std::vector<t_switchblock_inf> switchblocks;
14091409

1410-
/// Subtype of switch blocks.
14111410
/// Sub type and Fs are applied to pass tracks
14121411
int sub_fs;
1412+
1413+
/// Subtype of switch blocks.
14131414
enum e_switch_block_type switch_block_subtype;
14141415

1415-
/// Tileable routing parameters
1416+
// Following options are used only for tileable routing architecture
1417+
1418+
/// Whether the routing architecture is tileable
14161419
bool tileable;
1420+
1421+
/// Allow connection blocks to appear around the perimeter programmable block (mainly I/Os)
14171422
bool perimeter_cb;
1423+
1424+
/// Remove all the routing wires in empty regions
14181425
bool shrink_boundary;
1426+
1427+
/// Allow routing channels to pass through multi-width and multi-height programmable blocks.
14191428
bool through_channel;
1429+
1430+
/// Allow each output pin of a programmable block to drive the routing tracks on all the
1431+
/// sides of its adjacent switch block
14201432
bool opin2all_sides;
1433+
1434+
///In each switch block, allow each routing track which ends to drive another
1435+
/// routing track on the opposite side
14211436
bool concat_wire;
1437+
1438+
/// In each switch block, allow each routing track which passes to drive
1439+
/// another routing track on the opposite side
14221440
bool concat_pass_wire;
14231441

1442+
// End of tileable routing architecture-specific options
1443+
14241444
short global_route_switch;
14251445

14261446
/// Index of a zero delay switch (used to connect things that should have no delay).

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