Hardware Design Engineer
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Indian Institute of Science (IISc)
- Bengaluru-560012, India
-
00:20
(UTC +05:30) - https://nigilmohra.github.io/
- in/nigilmr
Highlights
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LTSpice_Simulations
LTSpice_Simulations PublicThis repository contains SPICE simulations conducted during my bachelor's degree.
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Bluespec_Verilog
Bluespec_Verilog PublicThis repository contains details of Bluespec Verilog (BSV), starting from the installation process to various combinational and sequential circuit implementations, as well as reference materials.
Bluespec 1
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OpenLane_Physical_Design
OpenLane_Physical_Design PublicThis repository contains steps to use OpenLane using the Sky130nm PDK for RTL to GDSII generation.
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Digital_Modulation
Digital_Modulation PublicThis repository contains documents, code, and materials related to the hardware implementation of digital modulation schemes on FPGA.
Verilog
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