Implement SVE2 BitwiseSelect, BitwiseSelectLeftInverted, BitwiseSelectRightInverted #115775
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| case NI_Sve2_BitwiseSelectRightInverted: | ||
| // op1: select, op2: left, op3: right | ||
| // Operation is destructive on the 'left' operand. | ||
| if (targetReg != op2Reg) |
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this should be op1Reg because 1st operand has RMW semantics, not 2nd.
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@kunalspathak this didn't need addressing because the logic was already correct, right?
The instruction is BSL <Zdn>.D, <Zdn>.D, <Zm>.D, <Zk>.D and the operation is:
CheckSVEEnabled();
constant integer VL = CurrentVL;
bits(VL) operand1 = Z[dn, VL];
bits(VL) operand2 = Z[m, VL];
bits(VL) operand3 = Z[k, VL];
Z[dn, VL] = (operand1 AND operand3) OR (operand2 AND NOT(operand3));
So we end up emitting mov tgt, op2; BSL tgt, op3, op1
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right, it was already resolved in #115775 (comment)
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/ba-g failures unrelated |
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/ba-g failures unrelated |
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@a74nh @kunalspathak
Contributes to #115479