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Merge pull request verilog-to-routing#3166 from verilog-to-routing/temp_chanz_rr_type
Some clean ups in RR graph generation and custom switch block parsing
2 parents ae57c3f + 5151634 commit 88cae23

19 files changed

+889
-815
lines changed

libs/libarchfpga/src/parse_switchblocks.cpp

Lines changed: 116 additions & 77 deletions
Large diffs are not rendered by default.
Lines changed: 37 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,19 +1,49 @@
11
#pragma once
22

3-
#include "physical_types.h"
43
#include "pugixml.hpp"
54
#include "pugixml_loc.hpp"
65
#include "vtr_expr_eval.h"
76

8-
/**** Function Declarations ****/
9-
/* Loads permutation funcs specified under Node into t_switchblock_inf */
10-
void read_sb_switchfuncs(pugi::xml_node Node, t_switchblock_inf* sb, const pugiutil::loc_data& loc_data);
7+
/**
8+
* @brief Loads permutation functions from an XML node into a switchblock structure.
9+
*
10+
* This function parses an XML `<switchfuncs>` node, extracts all `<func>` child elements,
11+
* and populates the corresponding entries in the `t_switchblock_inf::permutation_map`.
12+
* Each `<func>` element must have a `type` attribute indicating the connection type
13+
* (e.g., side-to-side) and a `formula` attribute specifying the permutation function.
14+
*
15+
* @param node XML node containing the `<switchfuncs>` specification.
16+
* @param sb The switchblock structure where permutation functions will be stored.
17+
* @param loc_data Location data used for error reporting during XML parsing.
18+
*
19+
* The function expects the following XML structure:
20+
* @code{.xml}
21+
* <switchfuncs>
22+
* <func type="..." formula="..."/>
23+
* ...
24+
* </switchfuncs>
25+
* @endcode
26+
*/
27+
void read_sb_switchfuncs(pugi::xml_node node, t_switchblock_inf& sb, const pugiutil::loc_data& loc_data);
1128

12-
/* Reads-in the wire connections specified for the switchblock in the xml arch file */
13-
void read_sb_wireconns(const std::vector<t_arch_switch_inf>& switches, pugi::xml_node Node, t_switchblock_inf* sb, const pugiutil::loc_data& loc_data);
29+
/**
30+
* @brief Reads wire connections for a switch block from the XML architecture file.
31+
*
32+
* This function parses all `<wireconn>` elements under the given `<switchblock>` XML node.
33+
* Each parsed connection is stored in the provided `t_switchblock_inf` structure.
34+
*
35+
* @param switches List of architecture switch definitions.
36+
* @param node XML node representing the switchblock.
37+
* @param sb The switchblock structure to populate.
38+
* @param loc_data Location data for error reporting.
39+
*/
40+
void read_sb_wireconns(const std::vector<t_arch_switch_inf>& switches,
41+
pugi::xml_node node,
42+
t_switchblock_inf& sb,
43+
const pugiutil::loc_data& loc_data);
1444

1545
/* checks for correctness of switch block read-in from the XML architecture file */
16-
void check_switchblock(const t_switchblock_inf* sb, const t_arch* arch);
46+
void check_switchblock(const t_switchblock_inf& sb, const t_arch* arch);
1747

1848
/* returns integer result according to the specified formula and data */
1949
int get_sb_formula_raw_result(vtr::FormulaParser& formula_parser, const char* formula, const vtr::t_formula_data& mydata);

libs/libarchfpga/src/physical_types.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -126,8 +126,7 @@ static bool switch_type_is_configurable(SwitchType type) {
126126
}
127127

128128
static e_directionality switch_type_directionality(SwitchType type) {
129-
if (type == SwitchType::SHORT
130-
|| type == SwitchType::PASS_GATE) {
129+
if (type == SwitchType::SHORT || type == SwitchType::PASS_GATE) {
131130
//Shorts and pass gates can conduct in either direction
132131
return e_directionality::BI_DIRECTIONAL;
133132
} else {

libs/libarchfpga/src/physical_types.h

Lines changed: 16 additions & 168 deletions
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,7 @@
4141

4242
#include "logic_types.h"
4343
#include "clock_types.h"
44+
#include "switchblock_types.h"
4445

4546
//Forward declarations
4647
struct t_clock_network;
@@ -171,24 +172,6 @@ enum e_interconnect {
171172
MUX_INTERC = 3
172173
};
173174

174-
/* Orientations. */
175-
enum e_side : unsigned char {
176-
TOP = 0,
177-
RIGHT = 1,
178-
BOTTOM = 2,
179-
LEFT = 3,
180-
NUM_2D_SIDES = 4,
181-
ABOVE = 5,
182-
UNDER = 7,
183-
NUM_3D_SIDES = 6,
184-
};
185-
186-
constexpr std::array<e_side, NUM_2D_SIDES> TOTAL_2D_SIDES = {{TOP, RIGHT, BOTTOM, LEFT}}; //Set of all side orientations
187-
constexpr std::array<const char*, NUM_2D_SIDES> TOTAL_2D_SIDE_STRINGS = {{"TOP", "RIGHT", "BOTTOM", "LEFT"}}; //String versions of side orientations
188-
189-
constexpr std::array<e_side, NUM_3D_SIDES> TOTAL_3D_SIDES = {{TOP, RIGHT, BOTTOM, LEFT, ABOVE, UNDER}}; //Set of all side orientations including different layers
190-
constexpr std::array<const char*, NUM_3D_SIDES> TOTAL_3D_SIDE_STRINGS = {{"TOP", "RIGHT", "BOTTOM", "LEFT", "ABOVE", "UNDER"}}; //String versions of side orientations including different layers
191-
192175
/* pin location distributions */
193176
enum class e_pin_location_distr {
194177
SPREAD,
@@ -253,26 +236,6 @@ enum e_power_estimation_method_ {
253236
typedef enum e_power_estimation_method_ e_power_estimation_method;
254237
typedef enum e_power_estimation_method_ t_power_estimation_method;
255238

256-
/* Specifies what part of the FPGA a custom switchblock should be built in (i.e. perimeter, core, everywhere) */
257-
enum class e_sb_location {
258-
E_PERIMETER = 0,
259-
E_CORNER,
260-
E_FRINGE, /* perimeter minus corners */
261-
E_CORE,
262-
E_EVERYWHERE,
263-
E_XY_SPECIFIED
264-
};
265-
266-
/**
267-
* @brief Describes regions that a specific switch block specifications should be applied to
268-
*/
269-
struct t_sb_loc_spec {
270-
int start = -1;
271-
int repeat = -1;
272-
int incr = -1;
273-
int end = -1;
274-
};
275-
276239
/*************************************************************************************************/
277240
/* FPGA grid layout data types */
278241
/*************************************************************************************************/
@@ -614,9 +577,6 @@ enum class e_sb_type {
614577

615578
};
616579

617-
constexpr int NO_SWITCH = -1;
618-
constexpr int DEFAULT_SWITCH = -2;
619-
620580
/* Describes the type for a physical tile
621581
* name: unique identifier for type
622582
* num_pins: Number of pins for the block
@@ -1668,11 +1628,6 @@ struct t_chan_width_dist {
16681628
t_chan chan_y_dist;
16691629
};
16701630

1671-
enum e_directionality {
1672-
UNI_DIRECTIONAL,
1673-
BI_DIRECTIONAL
1674-
};
1675-
16761631
/* X_AXIS: Data that describes an x-directed wire segment (CHANX) *
16771632
* Y_AXIS: Data that describes an y-directed wire segment (CHANY) *
16781633
* BOTH_AXIS: Data that can be applied to both x-directed and y-directed wire segment */
@@ -1730,95 +1685,83 @@ enum e_Fc_type {
17301685
* used if the route_type is DETAILED. [0 .. det_routing_arch.num_segment]
17311686
*/
17321687
struct t_segment_inf {
1733-
/**
1734-
* @brief The name of the segment type
1735-
*/
1688+
/// The name of the segment type
17361689
std::string name;
17371690

1738-
/**
1739-
* @brief ratio of tracks which are of this segment type.
1740-
*/
1691+
/// brief ratio of tracks which are of this segment type.
17411692
int frequency;
17421693

1743-
/**
1744-
* @brief Length (in clbs) of the segment.
1745-
*/
1694+
/// Length (in clbs) of the segment.
17461695
int length;
17471696

17481697
/**
1749-
* @brief Index of the switch type that connects other wires to this segment.
1698+
* @brief Index of the switch type that connects other wires to this segment.
17501699
* Note that this index is in relation to the switches from the architecture file,
17511700
* not the expanded list of switches that is built at the end of build_rr_graph.
17521701
*/
17531702
short arch_wire_switch;
17541703

17551704
/**
1756-
* @brief Index of the switch type that connects output pins to this segment.
1705+
* @brief Index of the switch type that connects output pins to this segment.
17571706
* Note that this index is in relation to the switches from the architecture file,
17581707
* not the expanded list of switches that is built at the end of build_rr_graph.
17591708
*/
17601709
short arch_opin_switch;
17611710

17621711
/**
1763-
* @brief Same as arch_wire_switch but used only for decremental tracks if it is
1712+
* @brief Same as arch_wire_switch but used only for decremental tracks if it is
17641713
* specified in the architecture file. If -1, this value was not set in the
17651714
* architecture file and arch_wire_switch should be used for "DEC_DIR" wire segments.
17661715
*/
17671716
short arch_wire_switch_dec = -1;
17681717

17691718
/**
1770-
* @brief Same as arch_opin_switch but used only for decremental tracks if
1719+
* @brief Same as arch_opin_switch but used only for decremental tracks if
17711720
* it is specified in the architecture file. If -1, this value was not set in
17721721
* the architecture file and arch_opin_switch should be used for "DEC_DIR" wire segments.
17731722
*/
17741723
short arch_opin_switch_dec = -1;
17751724

17761725
/**
1777-
* @brief Index of the switch type that connects output pins (OPINs) to this
1726+
* @brief Index of the switch type that connects output pins (OPINs) to this
17781727
* segment from another die (layer). Note that this index is in relation to
17791728
* the switches from the architecture file, not the expanded list of switches
17801729
* that is built at the end of build_rr_graph.
17811730
*/
17821731
short arch_inter_die_switch = -1;
17831732

17841733
/**
1785-
* @brief The fraction of logic blocks along its length to which this segment can connect.
1734+
* @brief The fraction of logic blocks along its length to which this segment can connect.
17861735
* (i.e. internal population).
17871736
*/
17881737
float frac_cb;
17891738

17901739
/**
1791-
* @brief The fraction of the length + 1 switch blocks along the segment to which the segment can connect.
1740+
* @brief The fraction of the length + 1 switch blocks along the segment to which the segment can connect.
17921741
* Segments that aren't long lines must connect to at least two switch boxes.
17931742
*/
17941743
float frac_sb;
17951744

17961745
bool longline;
17971746

1798-
/**
1799-
* @brief The resistance of a routing track, per unit logic block length. */
1747+
/// The resistance of a routing track, per unit logic block length.
18001748
float Rmetal;
18011749

1802-
/**
1803-
* @brief The capacitance of a routing track, per unit logic block length. */
1750+
/// The capacitance of a routing track, per unit logic block length.
18041751
float Cmetal;
18051752

18061753
enum e_directionality directionality;
18071754

18081755
/**
1809-
* @brief Defines what axis the segment is parallel to. See e_parallel_axis
1756+
* @brief Defines what axis the segment is parallel to. See e_parallel_axis
18101757
* comments for more details on the values.
18111758
*/
18121759
enum e_parallel_axis parallel_axis;
18131760

1814-
/**
1815-
* @brief A vector of booleans indicating whether the segment can connect to a logic block.
1816-
*/
1761+
/// A vector of booleans indicating whether the segment can connect to a logic block.
18171762
std::vector<bool> cb;
18181763

1819-
/**
1820-
* @brief A vector of booleans indicating whether the segment can connect to a switch block.
1821-
*/
1764+
/// A vector of booleans indicating whether the segment can connect to a switch block.
18221765
std::vector<bool> sb;
18231766

18241767
/**
@@ -2084,101 +2027,6 @@ struct t_direct_inf {
20842027
int line;
20852028
};
20862029

2087-
enum class SwitchPointOrder {
2088-
FIXED, //Switchpoints are ordered as specified in architecture
2089-
SHUFFLED //Switchpoints are shuffled (more diversity)
2090-
};
2091-
2092-
//A collection of switchpoints associated with a segment
2093-
struct t_wire_switchpoints {
2094-
std::string segment_name; //The type of segment
2095-
std::vector<int> switchpoints; //The indices of wire points along the segment
2096-
};
2097-
2098-
/* Used to list information about a set of track segments that should connect through a switchblock */
2099-
struct t_wireconn_inf {
2100-
std::vector<t_wire_switchpoints> from_switchpoint_set; //The set of segment/wirepoints representing the 'from' set (union of all t_wire_switchpoints in vector)
2101-
std::vector<t_wire_switchpoints> to_switchpoint_set; //The set of segment/wirepoints representing the 'to' set (union of all t_wire_switchpoints in vector)
2102-
SwitchPointOrder from_switchpoint_order = SwitchPointOrder::FIXED; //The desired from_switchpoint_set ordering
2103-
SwitchPointOrder to_switchpoint_order = SwitchPointOrder::FIXED; //The desired to_switchpoint_set ordering
2104-
int switch_override_indx = DEFAULT_SWITCH; // index in switch array of the switch used to override wire_switch of the 'to' set.
2105-
// DEFAULT_SWITCH is a sentinel value (i.e. the usual driving switch from a wire for the receiving wire will be used)
2106-
2107-
std::string num_conns_formula; /* Specifies how many connections should be made for this wireconn.
2108-
*
2109-
* '<int>': A specific number of connections
2110-
* 'from': The number of generated connections between the 'from' and 'to' sets equals the
2111-
* size of the 'from' set. This ensures every element in the from set is connected
2112-
* to an element of the 'to' set.
2113-
* Note: this it may result in 'to' elements being driven by multiple 'from'
2114-
* elements (if 'from' is larger than 'to'), or in some elements of 'to' having
2115-
* no driving connections (if 'to' is larger than 'from').
2116-
* 'to': The number of generated connections is set equal to the size of the 'to' set.
2117-
* This ensures that each element of the 'to' set has precisely one incoming connection.
2118-
* Note: this may result in 'from' elements driving multiple 'to' elements (if 'to' is
2119-
* larger than 'from'), or some 'from' elements driving to 'to' elements (if 'from' is
2120-
* larger than 'to')
2121-
*/
2122-
};
2123-
2124-
/* represents a connection between two sides of a switchblock */
2125-
class SB_Side_Connection {
2126-
public:
2127-
/* specify the two SB sides that form a connection */
2128-
enum e_side from_side = TOP;
2129-
enum e_side to_side = TOP;
2130-
2131-
void set_sides(enum e_side from, enum e_side to) {
2132-
from_side = from;
2133-
to_side = to;
2134-
}
2135-
2136-
SB_Side_Connection() = default;
2137-
2138-
SB_Side_Connection(enum e_side from, enum e_side to)
2139-
: from_side(from)
2140-
, to_side(to) {
2141-
}
2142-
2143-
/* overload < operator which will be used by std::map */
2144-
bool operator<(const SB_Side_Connection& obj) const {
2145-
bool result;
2146-
2147-
if (from_side < obj.from_side) {
2148-
result = true;
2149-
} else {
2150-
if (from_side == obj.from_side) {
2151-
result = (to_side < obj.to_side) ? true : false;
2152-
} else {
2153-
result = false;
2154-
}
2155-
}
2156-
2157-
return result;
2158-
}
2159-
};
2160-
2161-
/* Use a map to index into the string permutation functions used to connect from one side to another */
2162-
typedef std::map<SB_Side_Connection, std::vector<std::string>> t_permutation_map;
2163-
2164-
/* Lists all information about a particular switch block specified in the architecture file */
2165-
struct t_switchblock_inf {
2166-
std::string name; /* the name of this switchblock */
2167-
e_sb_location location; /* where on the FPGA this switchblock should be built (i.e. perimeter, core, everywhere) */
2168-
e_directionality directionality; /* the directionality of this switchblock (unidir/bidir) */
2169-
2170-
int x = -1; /* The exact x-axis location that this SB is used, meaningful when type is set to E_XY_specified */
2171-
int y = -1; /* The exact y-axis location that this SB is used, meaningful when type is set to E_XY_specified */
2172-
2173-
/* We can also define a region to apply this SB to all locations falls into this region using regular expression in the architecture file*/
2174-
t_sb_loc_spec reg_x;
2175-
t_sb_loc_spec reg_y;
2176-
2177-
t_permutation_map permutation_map; /* map holding the permutation functions attributed to this switchblock */
2178-
2179-
std::vector<t_wireconn_inf> wireconns; /* list of wire types/groups this SB will connect */
2180-
};
2181-
21822030
/* Clock related data types used for building a dedicated clock network */
21832031
struct t_clock_arch_spec {
21842032
std::vector<t_clock_network_arch> clock_networks_arch;

libs/libarchfpga/src/read_fpga_interchange_arch.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -16,9 +16,9 @@
1616
#include <map>
1717
#include <regex>
1818
#include <set>
19-
#include <stdlib.h>
19+
#include <cstdlib>
2020
#include <string>
21-
#include <string.h>
21+
#include <cstring>
2222
#include <zlib.h>
2323
#include <sstream>
2424

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