|
| 1 | +/* |
| 2 | + * Copyright (c) 2006-2023, RT-Thread Development Team |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + * |
| 6 | + * Change Logs: |
| 7 | + * Date Author Notes |
| 8 | + * 2020-08-21 heyuanjie87 first version |
| 9 | + * 2023-03-31 Vandoul formatting code. |
| 10 | + */ |
| 11 | + |
| 12 | +#include <rtthread.h> |
| 13 | +#include <rtdevice.h> |
| 14 | + |
| 15 | +#include "board.h" |
| 16 | +#include "i2c.h" |
| 17 | +#include "gpiohs.h" |
| 18 | +#include "utils.h" |
| 19 | +#include "sleep.h" |
| 20 | +#include "fpioa.h" |
| 21 | +#ifdef RT_USING_I2C |
| 22 | + |
| 23 | +#ifndef BSP_I2C0_SCL_PIN |
| 24 | +#define BSP_I2C0_SCL_PIN 0 |
| 25 | +#endif |
| 26 | +#ifndef BSP_I2C0_SDA_PIN |
| 27 | +#define BSP_I2C0_SDA_PIN 1 |
| 28 | +#endif |
| 29 | +#ifndef BSP_I2C1_SCL_PIN |
| 30 | +#define BSP_I2C1_SCL_PIN 30 |
| 31 | +#endif |
| 32 | +#ifndef BSP_I2C1_SDA_PIN |
| 33 | +#define BSP_I2C1_SDA_PIN 31 |
| 34 | +#endif |
| 35 | +#ifndef BSP_I2C2_SCL_PIN |
| 36 | +#define BSP_I2C2_SCL_PIN 4 |
| 37 | +#endif |
| 38 | +#ifndef BSP_I2C2_SDA_PIN |
| 39 | +#define BSP_I2C2_SDA_PIN 5 |
| 40 | +#endif |
| 41 | + |
| 42 | +static rt_err_t ki2c_send( |
| 43 | + volatile i2c_t *i2c_adapter, |
| 44 | + rt_uint8_t *send_buf, |
| 45 | + rt_uint32_t send_buf_len) |
| 46 | +{ |
| 47 | + rt_uint32_t fifo_len, index; |
| 48 | + |
| 49 | + while (send_buf_len) |
| 50 | + { |
| 51 | + fifo_len = 8 - i2c_adapter->txflr; |
| 52 | + fifo_len = send_buf_len < fifo_len ? send_buf_len : fifo_len; |
| 53 | + for (index = 0; index < fifo_len; index++) |
| 54 | + i2c_adapter->data_cmd = I2C_DATA_CMD_DATA(*send_buf++); |
| 55 | + if (i2c_adapter->tx_abrt_source != 0) |
| 56 | + { |
| 57 | + while (i2c_adapter->status & I2C_STATUS_ACTIVITY); // |
| 58 | + i2c_adapter->clr_intr = i2c_adapter->clr_intr; // |
| 59 | + return -RT_ERROR; |
| 60 | + } |
| 61 | + |
| 62 | + send_buf_len -= fifo_len; |
| 63 | + } |
| 64 | + |
| 65 | + return RT_EOK; |
| 66 | +} |
| 67 | + |
| 68 | +static rt_err_t ki2c_recv( |
| 69 | + volatile i2c_t *i2c_adapter, |
| 70 | + rt_uint8_t *receive_buf, |
| 71 | + rt_uint32_t receive_buf_len) |
| 72 | +{ |
| 73 | + rt_uint32_t fifo_len, index; |
| 74 | + rt_uint32_t rx_len = receive_buf_len; |
| 75 | + |
| 76 | + while (receive_buf_len || rx_len) |
| 77 | + { |
| 78 | + fifo_len = i2c_adapter->rxflr; |
| 79 | + fifo_len = rx_len < fifo_len ? rx_len : fifo_len; |
| 80 | + for (index = 0; index < fifo_len; index++) |
| 81 | + *receive_buf++ = (rt_uint8_t)i2c_adapter->data_cmd; |
| 82 | + rx_len -= fifo_len; |
| 83 | + fifo_len = 8 - i2c_adapter->txflr; |
| 84 | + fifo_len = receive_buf_len < fifo_len ? receive_buf_len : fifo_len; |
| 85 | + for (index = 0; index < fifo_len; index++) |
| 86 | + i2c_adapter->data_cmd = I2C_DATA_CMD_CMD; |
| 87 | + if (i2c_adapter->tx_abrt_source != 0) |
| 88 | + return -RT_ERROR; |
| 89 | + receive_buf_len -= fifo_len; |
| 90 | + } |
| 91 | + |
| 92 | + return RT_EOK; |
| 93 | +} |
| 94 | + |
| 95 | +static void ki2c_setaddr( |
| 96 | + volatile i2c_t *i2c_adapter, |
| 97 | + rt_uint16_t addr, |
| 98 | + int width) |
| 99 | +{ |
| 100 | + i2c_adapter->tar = I2C_TAR_ADDRESS(addr) & I2C_TAR_ADDRESS_MASK; |
| 101 | + |
| 102 | + if(width == 10) |
| 103 | + { |
| 104 | + i2c_adapter->tar |= I2C_TAR_10BITADDR_MASTER; |
| 105 | + } |
| 106 | + else |
| 107 | + { |
| 108 | + i2c_adapter->tar &= ~I2C_TAR_10BITADDR_MASTER; |
| 109 | + } |
| 110 | + |
| 111 | +} |
| 112 | + |
| 113 | +static int ki2c_waittx(volatile i2c_t *i2c_adapter, int timeout_ms) |
| 114 | +{ |
| 115 | + rt_tick_t start; |
| 116 | + |
| 117 | + start = rt_tick_get(); |
| 118 | + while ((i2c_adapter->status & I2C_STATUS_ACTIVITY) || !(i2c_adapter->status & I2C_STATUS_TFE)) |
| 119 | + { |
| 120 | + if (rt_tick_from_millisecond(rt_tick_get() - start) > timeout_ms) |
| 121 | + break; |
| 122 | + } |
| 123 | + |
| 124 | + if (i2c_adapter->tx_abrt_source != 0) |
| 125 | + return -RT_ERROR; |
| 126 | + |
| 127 | + return RT_EOK; |
| 128 | +} |
| 129 | + |
| 130 | +static void ki2c_clearerr(volatile i2c_t *i2c_adapter) |
| 131 | +{ |
| 132 | + i2c_adapter->clr_tx_abrt = i2c_adapter->clr_tx_abrt; |
| 133 | +} |
| 134 | + |
| 135 | +static rt_ssize_t _i2c_mst_xfer(struct rt_i2c_bus_device *bus, |
| 136 | + struct rt_i2c_msg msgs[], |
| 137 | + rt_uint32_t num) |
| 138 | +{ |
| 139 | + rt_ssize_t i; |
| 140 | + i2c_t *kbus = (i2c_t *)bus->priv; |
| 141 | + rt_err_t status; |
| 142 | + int waittx = 0; |
| 143 | + |
| 144 | + RT_ASSERT(bus != RT_NULL); |
| 145 | + if(msgs[0].flags & RT_I2C_ADDR_10BIT) |
| 146 | + { |
| 147 | + ki2c_setaddr(kbus, msgs[0].addr, 10); |
| 148 | + } |
| 149 | + else |
| 150 | + { |
| 151 | + ki2c_setaddr(kbus, msgs[0].addr, 7); |
| 152 | + } |
| 153 | + |
| 154 | + |
| 155 | + ki2c_clearerr(kbus); |
| 156 | + |
| 157 | + for (i = 0; i < num; i++) |
| 158 | + { |
| 159 | + waittx = 0; |
| 160 | + |
| 161 | + if (msgs[i].flags & RT_I2C_RD) |
| 162 | + { |
| 163 | + status = ki2c_recv(kbus, msgs[i].buf, msgs[i].len); |
| 164 | + } |
| 165 | + else |
| 166 | + { |
| 167 | + status = ki2c_send(kbus, msgs[i].buf, msgs[i].len); |
| 168 | + waittx = 1; |
| 169 | + } |
| 170 | + |
| 171 | + if (status != RT_EOK) |
| 172 | + { |
| 173 | + goto _out; |
| 174 | + } |
| 175 | + } |
| 176 | + |
| 177 | + if (waittx) |
| 178 | + { |
| 179 | + status = ki2c_waittx(kbus, 2000); |
| 180 | + if (status != RT_EOK) |
| 181 | + { |
| 182 | + goto _out; |
| 183 | + } |
| 184 | + } |
| 185 | + |
| 186 | + return i; |
| 187 | +_out: |
| 188 | + return status; |
| 189 | +} |
| 190 | + |
| 191 | +static const struct rt_i2c_bus_device_ops i2c_ops = |
| 192 | +{ |
| 193 | + .master_xfer = _i2c_mst_xfer, |
| 194 | + .slave_xfer = RT_NULL, |
| 195 | + .i2c_bus_control = RT_NULL, |
| 196 | +}; |
| 197 | + |
| 198 | +#ifdef RT_USING_I2C_BITOPS |
| 199 | + |
| 200 | +typedef struct pin_info_s { |
| 201 | + uint32_t scl; |
| 202 | + uint32_t sda; |
| 203 | +} pin_info_t; |
| 204 | + |
| 205 | +static void set_sda(void *data, rt_int32_t state) |
| 206 | +{ |
| 207 | + pin_info_t *pin = (pin_info_t *)data; |
| 208 | + /* state = 1: disable output. state = 0: enable output.*/ |
| 209 | + set_gpio_bit(gpiohs->output_en.u32, pin->sda, !state); |
| 210 | +} |
| 211 | + |
| 212 | +static void set_scl(void *data, rt_int32_t state) |
| 213 | +{ |
| 214 | + pin_info_t *pin = (pin_info_t *)data; |
| 215 | + /* state = 1: disable output. state = 0: enable output.*/ |
| 216 | + set_gpio_bit(gpiohs->output_en.u32, pin->scl, !state); |
| 217 | +} |
| 218 | + |
| 219 | +static rt_int32_t get_sda(void *data) |
| 220 | +{ |
| 221 | + pin_info_t *pin = (pin_info_t *)data; |
| 222 | + /* disable output.*/ |
| 223 | + set_gpio_bit(gpiohs->output_en.u32, pin->sda, 0); |
| 224 | + |
| 225 | + return get_gpio_bit(gpiohs->input_val.u32, pin->sda); |
| 226 | +} |
| 227 | + |
| 228 | +static rt_int32_t get_scl(void *data) |
| 229 | +{ |
| 230 | + pin_info_t *pin = (pin_info_t *)data; |
| 231 | + /* disable output.*/ |
| 232 | + set_gpio_bit(gpiohs->output_en.u32, pin->scl, 0); |
| 233 | + |
| 234 | + return get_gpio_bit(gpiohs->input_val.u32, pin->scl); |
| 235 | +} |
| 236 | + |
| 237 | +static void udelay(rt_uint32_t us) |
| 238 | +{ |
| 239 | + usleep((uint64_t)us); |
| 240 | +} |
| 241 | + |
| 242 | +static struct rt_i2c_bit_ops bit_ops_0 = |
| 243 | +{ |
| 244 | + RT_NULL, |
| 245 | + set_sda, |
| 246 | + set_scl, |
| 247 | + get_sda, |
| 248 | + get_scl, |
| 249 | + udelay, |
| 250 | + 5, |
| 251 | + 5 |
| 252 | +}; |
| 253 | + |
| 254 | +static struct rt_i2c_bit_ops bit_ops_1 = |
| 255 | +{ |
| 256 | + RT_NULL, |
| 257 | + set_sda, |
| 258 | + set_scl, |
| 259 | + get_sda, |
| 260 | + get_scl, |
| 261 | + udelay, |
| 262 | + 5, |
| 263 | + 5 |
| 264 | +}; |
| 265 | + |
| 266 | +static struct rt_i2c_bit_ops bit_ops_2 = |
| 267 | +{ |
| 268 | + RT_NULL, |
| 269 | + set_sda, |
| 270 | + set_scl, |
| 271 | + get_sda, |
| 272 | + get_scl, |
| 273 | + udelay, |
| 274 | + 5, |
| 275 | + 5 |
| 276 | +}; |
| 277 | + |
| 278 | +extern int get_pin_channel(rt_base_t pin_index); |
| 279 | +#endif |
| 280 | + |
| 281 | +int rt_hw_i2c_init(void) |
| 282 | +{ |
| 283 | + struct rt_i2c_bus_device *busdev; |
| 284 | + |
| 285 | +#ifdef BSP_USING_I2C0 |
| 286 | + static struct rt_i2c_bus_device i2c_dev0; |
| 287 | + busdev = &i2c_dev0; |
| 288 | + |
| 289 | + #ifdef RT_USING_I2C_BITOPS |
| 290 | + fpioa_set_function(BSP_I2C0_SCL_PIN, FUNC_RESV0); |
| 291 | + fpioa_set_function(BSP_I2C0_SDA_PIN, FUNC_RESV0); |
| 292 | + |
| 293 | + rt_pin_write(BSP_I2C0_SCL_PIN, PIN_LOW); |
| 294 | + rt_pin_write(BSP_I2C0_SDA_PIN, PIN_LOW); |
| 295 | + rt_pin_mode(BSP_I2C0_SCL_PIN, PIN_MODE_INPUT_PULLUP); |
| 296 | + rt_pin_mode(BSP_I2C0_SDA_PIN, PIN_MODE_INPUT_PULLUP); |
| 297 | + |
| 298 | + static pin_info_t pin0; |
| 299 | + pin0.scl = get_pin_channel(BSP_I2C0_SCL_PIN); |
| 300 | + pin0.sda = get_pin_channel(BSP_I2C0_SDA_PIN); |
| 301 | + bit_ops_0.data = (void *)&pin0; |
| 302 | + |
| 303 | + busdev->priv = (void *)&bit_ops_0; |
| 304 | + rt_i2c_bit_add_bus(busdev, "i2c0"); |
| 305 | + #else |
| 306 | + |
| 307 | + busdev->ops = &i2c_ops; |
| 308 | + busdev->priv = (void *)I2C0_BASE_ADDR; |
| 309 | + |
| 310 | + i2c_init(I2C_DEVICE_0, 0, 7, 100000); |
| 311 | + rt_i2c_bus_device_register(busdev, "i2c0"); |
| 312 | + #endif |
| 313 | +#endif |
| 314 | + |
| 315 | +#ifdef BSP_USING_I2C1 |
| 316 | + static struct rt_i2c_bus_device i2c_dev1; |
| 317 | + busdev = &i2c_dev1; |
| 318 | + |
| 319 | + #ifdef RT_USING_I2C_BITOPS |
| 320 | + fpioa_set_function(BSP_I2C1_SCL_PIN, FUNC_RESV0); |
| 321 | + fpioa_set_function(BSP_I2C1_SDA_PIN, FUNC_RESV0); |
| 322 | + |
| 323 | + rt_pin_write(BSP_I2C1_SCL_PIN, PIN_LOW); |
| 324 | + rt_pin_write(BSP_I2C1_SDA_PIN, PIN_LOW); |
| 325 | + rt_pin_mode(BSP_I2C1_SCL_PIN, PIN_MODE_INPUT_PULLUP); |
| 326 | + rt_pin_mode(BSP_I2C1_SDA_PIN, PIN_MODE_INPUT_PULLUP); |
| 327 | + |
| 328 | + static pin_info_t pin1; |
| 329 | + pin1.scl = get_pin_channel(BSP_I2C1_SCL_PIN); |
| 330 | + pin1.sda = get_pin_channel(BSP_I2C1_SDA_PIN); |
| 331 | + bit_ops_1.data = (void *)&pin1; |
| 332 | + |
| 333 | + busdev->priv = (void *)&bit_ops_1; |
| 334 | + rt_i2c_bit_add_bus(busdev, "i2c1"); |
| 335 | + #else |
| 336 | + |
| 337 | + busdev->ops = &i2c_ops; |
| 338 | + busdev->priv = (void *)I2C1_BASE_ADDR; |
| 339 | + |
| 340 | + i2c_init(I2C_DEVICE_1, 0, 7, 100000); |
| 341 | + rt_i2c_bus_device_register(busdev, "i2c1"); |
| 342 | + #endif |
| 343 | +#endif |
| 344 | + |
| 345 | +#ifdef BSP_USING_I2C2 |
| 346 | + static struct rt_i2c_bus_device i2c_dev2; |
| 347 | + busdev = &i2c_dev2; |
| 348 | + |
| 349 | + #ifdef RT_USING_I2C_BITOPS |
| 350 | + fpioa_set_function(BSP_I2C2_SCL_PIN, FUNC_RESV0); |
| 351 | + fpioa_set_function(BSP_I2C2_SDA_PIN, FUNC_RESV0); |
| 352 | + |
| 353 | + rt_pin_write(BSP_I2C2_SCL_PIN, PIN_LOW); |
| 354 | + rt_pin_write(BSP_I2C2_SDA_PIN, PIN_LOW); |
| 355 | + rt_pin_mode(BSP_I2C2_SCL_PIN, PIN_MODE_INPUT_PULLUP); |
| 356 | + rt_pin_mode(BSP_I2C2_SDA_PIN, PIN_MODE_INPUT_PULLUP); |
| 357 | + |
| 358 | + static pin_info_t pin2; |
| 359 | + pin2.scl = get_pin_channel(BSP_I2C2_SCL_PIN); |
| 360 | + pin2.sda = get_pin_channel(BSP_I2C2_SDA_PIN); |
| 361 | + bit_ops_2.data = (void *)&pin2; |
| 362 | + |
| 363 | + busdev->priv = (void *)&bit_ops_2; |
| 364 | + rt_i2c_bit_add_bus(busdev, "i2c2"); |
| 365 | + #else |
| 366 | + |
| 367 | + busdev->ops = &i2c_ops; |
| 368 | + busdev->priv = (void *)I2C2_BASE_ADDR; |
| 369 | + |
| 370 | + i2c_init(I2C_DEVICE_2, 0, 7, 100000); |
| 371 | + rt_i2c_bus_device_register(busdev, "i2c2"); |
| 372 | + #endif |
| 373 | +#endif |
| 374 | + return 0; |
| 375 | +} |
| 376 | +INIT_BOARD_EXPORT(rt_hw_i2c_init); |
| 377 | +#endif |
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