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Vandoulmysterywolf
Vandoul
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mysterywolf
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[bsp][lpc55sxx] add i2s and wm8904 driver
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‎bsp/lpc55sxx/Libraries/drivers/SConscript

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@@ -43,6 +43,12 @@ if GetDepend('BSP_USING_WDT'):
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if GetDepend('BSP_USING_PWM'):
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src += ['drv_pwm.c']
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if GetDepend('BSP_USING_I2S'):
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src += ['drv_i2s.c']
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if GetDepend('BSP_USING_WM8904'):
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src += ['drv_sound_wm8904.c']
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path = [cwd,cwd + '/config']
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group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path)

‎bsp/lpc55sxx/Libraries/drivers/drv_i2s.c

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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2023-03-12 Vandoul the first version
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*/
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#include <rtthread.h>
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#include "fsl_i2s.h"
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#include "fsl_i2s_dma.h"
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#include "drv_i2s.h"
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#define DBG_TAG "DRVI2S"
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#include "rtdbg.h"
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#ifdef BSP_USING_I2S
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#if !defined(BSP_USING_I2S0) && \
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!defined(BSP_USING_I2S1) && \
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!defined(BSP_USING_I2S2) && \
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!defined(BSP_USING_I2S3) && \
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!defined(BSP_USING_I2S4) && \
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!defined(BSP_USING_I2S5) && \
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!defined(BSP_USING_I2S6) && \
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!defined(BSP_USING_I2S7)
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#error "Please define at least one I2Sx"
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#endif
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#include <rtdevice.h>
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enum {
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#ifdef BSP_USING_I2S0
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I2S0_INDEX,
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#endif
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#ifdef BSP_USING_I2S1
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I2S1_INDEX,
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#endif
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#ifdef BSP_USING_I2S2
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I2S2_INDEX,
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#endif
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#ifdef BSP_USING_I2S3
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I2S3_INDEX,
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#endif
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#ifdef BSP_USING_I2S4
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I2S4_INDEX,
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#endif
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#ifdef BSP_USING_I2S5
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I2S5_INDEX,
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#endif
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#ifdef BSP_USING_I2S6
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I2S6_INDEX,
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#endif
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#ifdef BSP_USING_I2S7
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I2S7_INDEX,
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#endif
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};
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struct lpc_i2s_clock_and_irq_param
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{
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clock_attach_id_t i2s_clock;
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reset_ip_name_t i2s_reset_bit;
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IRQn_Type irq_type;
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};
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struct lpc_i2s
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{
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struct rt_device device;
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i2s_handle_t i2s_handle;
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struct lpc_i2s_config config;
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uint32_t index;
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I2S_Type *i2s_base;
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const char *device_name;
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};
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#define LPC_I2S_CONFIG_MODE_IS_SLAVE(dev) ((dev)->config.mode == LPC_I2S_CONFIG_MODE_SLAVE)
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#define LPC_I2S_CONFIG_MODE_IS_MASTER(dev) ((dev)->config.mode == LPC_I2S_CONFIG_MODE_MASTER)
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#define LPC_I2S_CLOCK_AND_IRQ_PARAM_INIT(index) {.i2s_clock = kPLL0_DIV_to_FLEXCOMM##index, .i2s_reset_bit = kFC##index##_RST_SHIFT_RSTn, .irq_type = FLEXCOMM##index##_IRQn,}
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const static struct lpc_i2s_clock_and_irq_param lpc_i2s_clock_and_irq_param_table[] =
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{
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#ifdef BSP_USING_I2S0
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// {.i2s_clock = kPLL0_DIV_to_FLEXCOMM0, .i2s_reset_bit = kFC0_RST_SHIFT_RSTn, .irq_type = FLEXCOMM0_IRQn,},
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LPC_I2S_CLOCK_AND_IRQ_PARAM_INIT(0),
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#endif
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#ifdef BSP_USING_I2S1
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LPC_I2S_CLOCK_AND_IRQ_PARAM_INIT(1),
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#endif
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#ifdef BSP_USING_I2S2
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LPC_I2S_CLOCK_AND_IRQ_PARAM_INIT(2),
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#endif
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#ifdef BSP_USING_I2S3
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LPC_I2S_CLOCK_AND_IRQ_PARAM_INIT(3),
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#endif
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#ifdef BSP_USING_I2S4
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LPC_I2S_CLOCK_AND_IRQ_PARAM_INIT(4),
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#endif
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#ifdef BSP_USING_I2S5
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LPC_I2S_CLOCK_AND_IRQ_PARAM_INIT(5),
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#endif
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#ifdef BSP_USING_I2S6
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LPC_I2S_CLOCK_AND_IRQ_PARAM_INIT(6),
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#endif
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#ifdef BSP_USING_I2S7
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LPC_I2S_CLOCK_AND_IRQ_PARAM_INIT(7),
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#endif
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};
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static struct lpc_i2s lpc_i2s_table[] =
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{
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#ifdef BSP_USING_I2S0
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{.index = I2S0_INDEX,.i2s_base = I2S0,.device_name = "i2s0"},
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#endif
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#ifdef BSP_USING_I2S1
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{.index = I2S1_INDEX,.i2s_base = I2S1,.device_name = "i2s1"},
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#endif
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#ifdef BSP_USING_I2S2
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{.index = I2S2_INDEX,.i2s_base = I2S2,.device_name = "i2s2"},
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#endif
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#ifdef BSP_USING_I2S3
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{.index = I2S3_INDEX,.i2s_base = I2S3,.device_name = "i2s3"},
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#endif
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#ifdef BSP_USING_I2S4
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{.index = I2S4_INDEX,.i2s_base = I2S4,.device_name = "i2s4"},
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#endif
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#ifdef BSP_USING_I2S5
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{.index = I2S5_INDEX,.i2s_base = I2S5,.device_name = "i2s5"},
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#endif
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#ifdef BSP_USING_I2S6
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{.index = I2S6_INDEX,.i2s_base = I2S6,.device_name = "i2s6"},
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#endif
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#ifdef BSP_USING_I2S7
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{.index = I2S7_INDEX,.i2s_base = I2S7,.device_name = "i2s7"},
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#endif
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};
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static void transfer_callback(I2S_Type *base, i2s_handle_t *handle, status_t completionStatus, void *userData)
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{
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struct lpc_i2s *i2s_dev = rt_container_of(handle, struct lpc_i2s, i2s_handle);
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if(LPC_I2S_CONFIG_MODE_IS_SLAVE(i2s_dev))
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{
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if(i2s_dev->device.rx_indicate != RT_NULL)
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{
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i2s_dev->device.rx_indicate(&i2s_dev->device, completionStatus);
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}
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}
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else
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{
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if(i2s_dev->device.tx_complete != RT_NULL)
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{
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i2s_dev->device.tx_complete(&i2s_dev->device, RT_NULL);
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}
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}
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}
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static void i2s_clock_and_irq_config(struct lpc_i2s *dev)
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{
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const struct lpc_i2s_clock_and_irq_param *clock_and_irq_param = &lpc_i2s_clock_and_irq_param_table[dev->index];
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// CLOCK_SetClkDiv(kCLOCK_DivPll0Clk, 0U, true);
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// CLOCK_SetClkDiv(kCLOCK_DivPll0Clk, 1U, false);
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CLOCK_AttachClk(clock_and_irq_param->i2s_clock);
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RESET_PeripheralReset(clock_and_irq_param->i2s_reset_bit);
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NVIC_ClearPendingIRQ(clock_and_irq_param->irq_type);
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/* Enable interrupts for I2S */
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EnableIRQ(clock_and_irq_param->irq_type);
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}
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rt_err_t rt_i2s_init(rt_device_t dev)
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{
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struct lpc_i2s *i2s_dev = rt_container_of(dev, struct lpc_i2s, device);
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i2s_clock_and_irq_config(i2s_dev);
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return RT_EOK;
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}
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rt_err_t rt_i2s_open(rt_device_t dev, rt_uint16_t oflag)
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{
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struct lpc_i2s *i2s_dev = rt_container_of(dev, struct lpc_i2s, device);
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i2s_config_t config;
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if(i2s_dev->config.mode == LPC_I2S_CONFIG_MODE_SLAVE)
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{
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RT_ASSERT(i2s_dev->config.is_blocking == 0);
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I2S_RxGetDefaultConfig(&config);
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config.divider = CLOCK_GetPll0OutFreq()/i2s_dev->config.sampling_rate/i2s_dev->config.data_bits/i2s_dev->config.channels;
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config.masterSlave = kI2S_MasterSlaveNormalSlave;
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I2S_RxInit(i2s_dev->i2s_base, &config);
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I2S_RxTransferCreateHandle(i2s_dev->i2s_base, &i2s_dev->i2s_handle, transfer_callback, NULL);
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}
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else if(i2s_dev->config.mode == LPC_I2S_CONFIG_MODE_MASTER)
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{
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RT_ASSERT(i2s_dev->config.is_blocking == 0);
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I2S_TxGetDefaultConfig(&config);
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config.divider = CLOCK_GetPll0OutFreq()/i2s_dev->config.sampling_rate/i2s_dev->config.data_bits/i2s_dev->config.channels;
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config.masterSlave = kI2S_MasterSlaveNormalMaster;
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I2S_TxInit(i2s_dev->i2s_base, &config);
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I2S_TxTransferCreateHandle(i2s_dev->i2s_base, &i2s_dev->i2s_handle, transfer_callback, NULL);
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}
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return RT_EOK;
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}
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rt_err_t rt_i2s_close(rt_device_t dev)
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{
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struct lpc_i2s *i2s_dev = rt_container_of(dev, struct lpc_i2s, device);
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I2S_Deinit(i2s_dev->i2s_base);
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return RT_EOK;
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}
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rt_ssize_t rt_i2s_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
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{
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struct lpc_i2s *i2s_dev = rt_container_of(dev, struct lpc_i2s, device);
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if(!LPC_I2S_CONFIG_MODE_IS_SLAVE(i2s_dev))
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{
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return -RT_ERROR;
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}
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i2s_transfer_t transfer;
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transfer.data = buffer;
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transfer.dataSize = size;
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if(kStatus_Success == I2S_RxTransferNonBlocking(i2s_dev->i2s_base, &i2s_dev->i2s_handle, transfer))
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return size;
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else
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return -RT_EBUSY;
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}
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rt_ssize_t rt_i2s_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
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{
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struct lpc_i2s *i2s_dev = rt_container_of(dev, struct lpc_i2s, device);
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if(!LPC_I2S_CONFIG_MODE_IS_MASTER(i2s_dev))
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{
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return -RT_ERROR;
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}
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i2s_transfer_t transfer;
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transfer.data = (uint8_t *)buffer;
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transfer.dataSize = size;
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if(kStatus_Success == I2S_TxTransferNonBlocking(i2s_dev->i2s_base, &i2s_dev->i2s_handle, transfer))
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return size;
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else
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return -RT_EBUSY;
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}
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rt_err_t rt_i2s_control(rt_device_t dev, int cmd, void *args)
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{
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struct lpc_i2s *i2s_dev = rt_container_of(dev, struct lpc_i2s, device);
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rt_err_t ret = RT_EOK;
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RT_ASSERT(dev != RT_NULL);
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RT_ASSERT(args != RT_NULL);
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switch(cmd)
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{
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case RT_I2S_CTRL_RESET:
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i2s_clock_and_irq_config(i2s_dev);
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break;
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case RT_I2S_CTRL_SET_CONFIG:
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{
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struct lpc_i2s_config *config = (struct lpc_i2s_config *)args;
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i2s_dev->config = *config;
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}
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break;
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default:
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ret = -RT_ERROR;
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break;
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}
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return ret;
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}
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#ifdef RT_USING_DEVICE_OPS
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const static struct rt_device_ops i2s_core_ops =
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{
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rt_i2s_init,
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rt_i2s_open,
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rt_i2s_close,
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rt_i2s_read,
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rt_i2s_write,
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rt_i2s_control,
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};
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#endif /* RT_USING_DEVICE_OPS */
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int rt_hw_i2s_init(void)
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{
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struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
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int i;
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for (i = 0; i < sizeof(lpc_i2s_table) / sizeof(lpc_i2s_table[0]); i++)
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{
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#ifdef RT_USING_DEVICE_OPS
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lpc_i2s_table[i].device.ops = &i2s_core_ops;
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#else
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lpc_i2s_table[i].device.init = rt_i2s_init;
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lpc_i2s_table[i].device.open = rt_i2s_open;
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lpc_i2s_table[i].device.close = rt_i2s_close;
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lpc_i2s_table[i].device.read = rt_i2s_read;
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lpc_i2s_table[i].device.write = rt_i2s_write;
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lpc_i2s_table[i].device.control = rt_i2s_control;
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#endif
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/* register UART device */
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rt_device_register(&lpc_i2s_table[i].device,
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lpc_i2s_table[i].device_name,
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
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}
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return 0;
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}
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INIT_BOARD_EXPORT(rt_hw_i2s_init);
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#endif
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‎bsp/lpc55sxx/Libraries/drivers/drv_i2s.h

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/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2023-03-12 Vandoul the first version
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*/
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#ifndef __DRV_I2S_H__
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#define __DRV_I2S_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <rtthread.h>
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#pragma pack(push,1)
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struct lpc_i2s_config
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{
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uint32_t sampling_rate;
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uint8_t mode;
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uint8_t data_bits;
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uint8_t channels;
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uint8_t is_blocking;
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};
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#pragma pack(pop)
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#define LPC_I2S_CONFIG_MODE_NULL 0
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#define LPC_I2S_CONFIG_MODE_SLAVE 1
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#define LPC_I2S_CONFIG_MODE_MASTER 2
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#define RT_I2S_CTRL_RESET (RT_DEVICE_CTRL_BASE(Bus) + 1)
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#define RT_I2S_CTRL_SET_CONFIG (RT_DEVICE_CTRL_BASE(Bus) + 2)
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#ifdef __cplusplus
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}
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#endif
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#endif
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