[gfx1201] Enable RMSNorm support for gfx1201#4
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tjtanaa
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Mar 16, 2026
csrc/include/hip_reduce.h
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| return local; | ||
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| } No newline at end of file |
tjtanaa
reviewed
Mar 16, 2026
csrc/kernels/quant_kernels.cu
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| asm volatile( "s_mov_b32 m0 %0\n\t" | ||
| "buffer_load_dword %1, %2, 0 offen offset:0 lds\n\t" | ||
| ::"s"(lds_ptr_sgpr), "v"(offset), "s"(buffer_hash.cached_rsrc): "memory", "m0"); | ||
| asm volatile("s_mov_b32 m0, %0; buffer_load_dword %1, %2, 0 offen lds;" :: "s"(lds_ptr_sgpr), "v"(offset), "s"(buffer_hash.cached_rsrc) : "memory"); |
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@big-yellow-duck is this change necessary? It looks the same. If it is just a alignment issue, please revert this to original code. Let's not reformat the code to avoid confusion. This makes the reviewer thinks you have modified the instruction.
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Motivation
The RMSNorm kernels in
csrc/kernels/rmsnorm_quant_kernels.cuuse CDNA-specific inline assembly instructions that are not supported on RDNA4 (gfx1201) architecture. This prevents the RMSNorm operation from working on gfx1201 GPUs. This PR aims to enable RMSNorm support on gfx1201 by replacing unsupported assembly instructions with portable HIP/C++ alternatives.Technical Details
Changes Overview
Modified
csrc/kernels/rmsnorm_quant_kernels.cuto replace CDNA-specific inline assembly with portable implementations for gfx11/gfx12:Replaced
v_pk_mul_f32inline assembly (lines 146-151, 196-201)asm volatile("v_pk_mul_f32 %0, %1, %2" ...)__gfx11__ || __gfx12__guardReplaced bf16 unpacking inline assembly (lines 162-176)
v_lshlrev_b32_e32andv_and_b32_e32instructionsck_tile::bit_castwith shift operations for unpacking bf16 valuesReplaced fp16 unpacking inline assembly (lines 180-194)
v_cvt_f32_f16_e32andv_cvt_f32_f16_sdwainstructionsck_tile::bit_castwith shift operations for unpacking fp16 valuesCompatibility
#if defined(__gfx11__) || defined(__gfx12__)) to ensure optimal performance on both architecturesTest Plan
Run the RMSNorm test suites to validate the changes:
Tests cover:
Test Result
Test result for
python op_tests/test_rmsnorm2dFusedAddQuant.py --mode 7 -q fp8Submission Checklist