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ignore chanz in rr_graph_area.cpp
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+32
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1 file changed

+32
-34
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vpr/src/route/rr_graph_generation/rr_graph_area.cpp

Lines changed: 32 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,10 @@ static void count_unidir_routing_transistors(std::vector<t_segment_inf>& segment
3333
const float trans_sram_bit,
3434
bool is_flat);
3535

36-
static float get_cblock_trans(int* num_inputs_to_cblock, int wire_to_ipin_switch, int max_inputs_to_cblock, float trans_sram_bit);
36+
static float get_cblock_trans(vtr::vector<RRNodeId, int>& num_inputs_to_cblock,
37+
int wire_to_ipin_switch,
38+
int max_inputs_to_cblock,
39+
float trans_sram_bit);
3740

3841
static float* alloc_and_load_unsharable_switch_trans(int num_switch,
3942
float trans_sram_bit,
@@ -108,9 +111,9 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl
108111
auto& device_ctx = g_vpr_ctx.device();
109112
const auto& rr_graph = device_ctx.rr_graph;
110113

111-
int* num_inputs_to_cblock; /* [0..device_ctx.rr_nodes.size()-1], but all entries not */
114+
vtr::vector<RRNodeId, int> num_inputs_to_cblock(rr_graph.num_nodes(), 0); // entries not corresponding to IPINs will be 0
115+
112116

113-
/* corresponding to IPINs will be 0. */
114117

115118
bool* cblock_counted; /* [0..max(device_ctx.grid.width(),device_ctx.grid.height())] -- 0th element unused. */
116119
float* shared_buffer_trans; /* [0..max(device_ctx.grid.width(),device_ctx.grid.height())] */
@@ -145,16 +148,11 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl
145148
* wiring C plus the fanout. */
146149

147150
if (INCLUDE_TRACK_BUFFERS) {
148-
trans_track_to_cblock_buf = trans_per_buf(R_minW_nmos / 4., R_minW_nmos,
149-
R_minW_pmos);
151+
trans_track_to_cblock_buf = trans_per_buf(R_minW_nmos / 4., R_minW_nmos, R_minW_pmos);
150152
} else {
151153
trans_track_to_cblock_buf = 0;
152154
}
153155

154-
num_inputs_to_cblock = new int[rr_graph.num_nodes()];
155-
for (size_t cb = 0; cb < rr_graph.num_nodes(); cb++)
156-
num_inputs_to_cblock[cb] = 0;
157-
158156
maxlen = std::max(device_ctx.grid.width(), device_ctx.grid.height());
159157
cblock_counted = new bool[maxlen];
160158
shared_buffer_trans = new float[maxlen];
@@ -169,7 +167,7 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl
169167
sharable_switch_trans = alloc_and_load_sharable_switch_trans(num_switch,
170168
R_minW_nmos, R_minW_pmos);
171169

172-
for (const RRNodeId& from_rr_node : device_ctx.rr_graph.nodes()) {
170+
for (const RRNodeId from_rr_node : device_ctx.rr_graph.nodes()) {
173171
size_t from_node = (size_t)from_rr_node;
174172
from_rr_type = rr_graph.node_type(from_rr_node);
175173

@@ -210,9 +208,8 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl
210208
break;
211209

212210
case e_rr_type::IPIN:
213-
num_inputs_to_cblock[size_t(to_node)]++;
214-
max_inputs_to_cblock = std::max(max_inputs_to_cblock,
215-
num_inputs_to_cblock[size_t(to_node)]);
211+
num_inputs_to_cblock[to_node]++;
212+
max_inputs_to_cblock = std::max(max_inputs_to_cblock, num_inputs_to_cblock[to_node]);
216213

217214
iseg = seg_index_of_cblock(rr_graph, from_rr_type, size_t(to_node));
218215

@@ -293,8 +290,6 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl
293290
input_cblock_trans = get_cblock_trans(num_inputs_to_cblock, wire_to_ipin_switch,
294291
max_inputs_to_cblock, trans_sram_bit);
295292

296-
delete[] num_inputs_to_cblock;
297-
298293
ntrans_sharing += input_cblock_trans;
299294
ntrans_no_sharing += input_cblock_trans;
300295

@@ -317,17 +312,14 @@ void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segment_inf*
317312
const auto& rr_graph = device_ctx.rr_graph;
318313

319314
bool* cblock_counted; /* [0..max(device_ctx.grid.width(),device_ctx.grid.height())] -- 0th element unused. */
320-
int* num_inputs_to_cblock; /* [0..device_ctx.rr_nodes.size()-1], but all entries not */
321-
322-
/* corresponding to IPINs will be 0. */
315+
vtr::vector<RRNodeId, int> num_inputs_to_cblock(rr_graph.num_nodes(), 0); // entries not corresponding to IPINs will be 0
323316

324317
e_rr_type from_rr_type, to_rr_type;
325318
int i, j, iseg, iedge, num_edges, maxlen;
326319
int max_inputs_to_cblock;
327320
float input_cblock_trans;
328321

329-
/* August 2014:
330-
* In a unidirectional architecture all the fanin to a wire segment comes from
322+
/* In a unidirectional architecture all the fanin to a wire segment comes from
331323
* a single mux. We should count this mux only once as we look at the outgoing
332324
* switches of all rr nodes. Thus we keep track of which muxes we have already
333325
* counted via the variable below. */
@@ -361,17 +353,13 @@ void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segment_inf*
361353
trans_track_to_cblock_buf = 0;
362354
}
363355

364-
num_inputs_to_cblock = new int[rr_graph.num_nodes()];
365-
for (size_t c = 0; c < rr_graph.num_nodes(); c++)
366-
num_inputs_to_cblock[c] = 0;
367-
368356
maxlen = std::max(device_ctx.grid.width(), device_ctx.grid.height());
369357
cblock_counted = new bool[maxlen];
370358
for (auto k = 0; k < maxlen; k++)
371359
cblock_counted[k] = 0;
372360

373361
ntrans = 0;
374-
for (const RRNodeId& from_rr_node : device_ctx.rr_graph.nodes()) {
362+
for (const RRNodeId from_rr_node : device_ctx.rr_graph.nodes()) {
375363
size_t from_node = size_t(from_rr_node);
376364
from_rr_type = rr_graph.node_type(from_rr_node);
377365

@@ -395,7 +383,7 @@ void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segment_inf*
395383
case e_rr_type::CHANY:
396384
if (!chan_node_switch_done[size_t(to_node)]) {
397385
int switch_index = rr_graph.edge_switch(RRNodeId(from_node), iedge);
398-
auto switch_type = rr_graph.rr_switch_inf(RRSwitchId(switch_index)).type();
386+
SwitchType switch_type = rr_graph.rr_switch_inf(RRSwitchId(switch_index)).type();
399387

400388
int fan_in = rr_graph.node_fan_in(to_node);
401389

@@ -411,7 +399,7 @@ void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segment_inf*
411399
* the rr switches were created from the arch switches */
412400
ntrans += rr_graph.rr_switch_inf(RRSwitchId(switch_index)).buf_size;
413401
} else if (switch_type == SwitchType::SHORT) {
414-
ntrans += 0.; //Electrical shorts contribute no transisitor area
402+
ntrans += 0.; //Electrical shorts contribute no transistor area
415403
} else if (switch_type == SwitchType::BUFFER) {
416404
if (fan_in != 1) {
417405
std::string msg = vtr::string_fmt(
@@ -434,9 +422,8 @@ void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segment_inf*
434422
break;
435423

436424
case e_rr_type::IPIN:
437-
num_inputs_to_cblock[size_t(to_node)]++;
438-
max_inputs_to_cblock = std::max(max_inputs_to_cblock,
439-
num_inputs_to_cblock[size_t(to_node)]);
425+
num_inputs_to_cblock[to_node]++;
426+
max_inputs_to_cblock = std::max(max_inputs_to_cblock, num_inputs_to_cblock[to_node]);
440427
iseg = seg_index_of_cblock(rr_graph, from_rr_type, size_t(to_node));
441428

442429
if (cblock_counted[iseg] == false) {
@@ -448,6 +435,10 @@ void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segment_inf*
448435
case e_rr_type::SINK:
449436
break; //ignore virtual sinks
450437

438+
case e_rr_type::CHANZ:
439+
// TODO: handle chanz
440+
break;
441+
451442
default:
452443
VPR_ERROR(VPR_ERROR_ROUTE,
453444
"in count_routing_transistors:\n"
@@ -470,9 +461,14 @@ void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segment_inf*
470461
cblock_counted[j] = false;
471462
}
472463
break;
464+
473465
case e_rr_type::OPIN:
474466
break;
475467

468+
case e_rr_type::CHANZ:
469+
// TODO: handle chanz
470+
break;
471+
476472
default:
477473
break;
478474

@@ -485,7 +481,6 @@ void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segment_inf*
485481
max_inputs_to_cblock, trans_sram_bit);
486482

487483
delete[] cblock_counted;
488-
delete[] num_inputs_to_cblock;
489484

490485
ntrans += input_cblock_trans;
491486

@@ -494,7 +489,10 @@ void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segment_inf*
494489
VTR_LOG("\tTotal routing area: %#g, per logic tile: %#g\n", ntrans, ntrans / (float)(device_ctx.grid.get_num_layers() * device_ctx.grid.width() * device_ctx.grid.height()));
495490
}
496491

497-
static float get_cblock_trans(int* num_inputs_to_cblock, int wire_to_ipin_switch, int max_inputs_to_cblock, float trans_sram_bit) {
492+
static float get_cblock_trans(vtr::vector<RRNodeId, int>& num_inputs_to_cblock,
493+
int wire_to_ipin_switch,
494+
int max_inputs_to_cblock,
495+
float trans_sram_bit) {
498496
/* Computes the transistors in the input connection block multiplexers and *
499497
* the buffers from connection block outputs to the logic block input pins. *
500498
* For speed, I precompute the number of transistors in the multiplexers of *
@@ -522,8 +520,8 @@ static float get_cblock_trans(int* num_inputs_to_cblock, int wire_to_ipin_switch
522520

523521
trans_count = 0.;
524522

525-
for (const RRNodeId& rr_id : device_ctx.rr_graph.nodes()) {
526-
num_inputs = num_inputs_to_cblock[(size_t)rr_id];
523+
for (const RRNodeId rr_id : device_ctx.rr_graph.nodes()) {
524+
num_inputs = num_inputs_to_cblock[rr_id];
527525
trans_count += trans_per_cblock[num_inputs];
528526
}
529527

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