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Merge branch 'master' of https://github.com/verilog-to-routing/vtr-verilog-to-routing into placement_search_range
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‎.github/workflows/test.yml

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run: ./.github/scripts/unittest.sh
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Warnings:
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name: 'W: Check Compilation Warnings'
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runs-on: ubuntu-24.04
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steps:
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- uses: actions/setup-python@v5
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with:
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python-version: 3.12.3
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- uses: actions/checkout@v4
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with:
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submodules: 'true'
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- name: Get number of CPU cores
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uses: SimenB/github-actions-cpu-cores@v2
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id: cpu-cores
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- name: Install dependencies
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run: ./.github/scripts/install_dependencies.sh
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- uses: hendrikmuhs/[email protected]
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- name: Test
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env:
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#In order to get compilation warnings produced per source file, we must do a non-IPO build
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#We also turn warnings into errors for this target by doing a strict compile
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CMAKE_PARAMS: "-DVTR_ASSERT_LEVEL=3 -DWITH_BLIFEXPLORER=on -DVTR_ENABLE_STRICT_COMPILE=on -DVTR_IPO_BUILD=off"
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NUM_PROC: ${{ steps.cpu-cores.outputs.count }}
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run: |
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export PATH="/usr/lib/ccache:/usr/local/opt/ccache/libexec:$PATH"
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./.github/scripts/build.sh
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Regression:
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runs-on: ubuntu-24.04
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strategy:
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suite: 'vtr_reg_basic',
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extra_pkgs: ""
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},
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{
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name: 'Basic with serial VPR_EXECUTION_ENGINE',
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params: '-DCMAKE_COMPILE_WARNING_AS_ERROR=on -DVTR_IPO_BUILD=off -DVTR_ASSERT_LEVEL=3 -DWITH_BLIFEXPLORER=on -DVPR_EXECUTION_ENGINE=serial -DTATUM_EXECUTION_ENGINE=serial',
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suite: 'vtr_reg_basic',
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extra_pkgs: ""
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},
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{
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name: 'Basic with VTR_ENABLE_DEBUG_LOGGING',
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params: '-DCMAKE_COMPILE_WARNING_AS_ERROR=on -DVTR_IPO_BUILD=off -DVTR_ASSERT_LEVEL=3 -DWITH_BLIFEXPLORER=on -DVTR_ENABLE_DEBUG_LOGGING=on',
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- Build
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- Format
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- UniTests
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- Warnings
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- Regression
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- Sanitized
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- Parmys

‎.readthedocs.yaml

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python:
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install:
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- requirements: doc/requirements.txt
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- requirements: requirements.txt

‎CMakeLists.txt

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set(VTR_ASSERT_LEVEL "2" CACHE STRING "VTR assertion checking level. 0: no assertions, 1: fast assertions, 2: regular assertions, 3: additional assertions with noticeable run-time overhead, 4: all assertions (including those with significant run-time cost)")
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set_property(CACHE VTR_ASSERT_LEVEL PROPERTY STRINGS 0 1 2 3 4)
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option(VTR_ENABLE_STRICT_COMPILE "Specifies whether compiler warnings should be treated as errors (e.g. -Werror)" OFF)
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option(VTR_ENABLE_SANITIZE "Enable address/leak/undefined-behaviour sanitizers (i.e. run-time error checking)" OFF)
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option(VTR_ENABLE_PROFILING "Enable performance profiler (gprof)" OFF)
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option(VTR_ENABLE_COVERAGE "Enable code coverage tracking (gcov)" OFF)

‎Makefile

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#Are we doing a strict (i.e. warnings as errors) build?
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ifneq (,$(findstring strict,$(BUILD_TYPE)))
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#Configure for strict build with VPR warning treated as errors
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override CMAKE_PARAMS := -DVTR_ENABLE_STRICT_COMPILE=on ${CMAKE_PARAMS}
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override CMAKE_PARAMS := -DCMAKE_COMPILE_WARNING_AS_ERROR=on ${CMAKE_PARAMS}
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endif #Strict build type
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#Enable verbosity

‎README.developers.md

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VTR has support for several additional tools/features to aid debugging.
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## Basic
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To build vpr with make in debug mode, simply add `BUILD_TYPE=debug` at the end of your make command.
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To build a tool with make in debug mode, simply add `BUILD_TYPE=debug` at the end of your make command. For example, to build all tools in debug mode use:
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```shell
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$ make vpr BUILD_TYPE=debug
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$ make BUILD_TYPE=debug
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```
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You can also enable additional (verbose) output from some tools. To build vpr with both debug information and additional output, use:
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```shell
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$ make vpr BUILD_TYPE=debug VERBOSE=1
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```
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## Sanitizers
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VTR can be compiled using *sanitizers* which will detect invalid memory accesses, memory leaks and undefined behaviour (supported by both GCC and LLVM):
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```shell

‎doc/_doxygen/ezgl.dox

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PROJECT_NAME = "Verilog to Routing - EZGL"
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OUTPUT_DIRECTORY = ../_build/doxygen/ezgl
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FULL_PATH_NAMES = NO
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OPTIMIZE_OUTPUT_FOR_C = YES
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EXTRACT_ALL = YES
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EXTRACT_PRIVATE = YES
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EXTRACT_STATIC = YES
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WARN_IF_UNDOCUMENTED = NO
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INPUT = ../../libs/EXTERNAL/libezgl
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RECURSIVE = YES
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GENERATE_HTML = NO
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GENERATE_LATEX = NO
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GENERATE_XML = YES

‎doc/src/api/ezgl/application.rst

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===========
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Application
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===========
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.. doxygenfile:: application.hpp
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:project: ezgl

‎doc/src/api/ezgl/callback.rst

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=========
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Callbacks
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=========
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This module provides callback functions for handling keyboard and mouse input, as well as predefined button actions in EZGL applications.
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Input Event Callbacks
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--------------------
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.. doxygenfunction:: press_key
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:project: ezgl
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.. doxygenfunction:: press_mouse
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:project: ezgl
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.. doxygenfunction:: release_mouse
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:project: ezgl
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.. doxygenfunction:: move_mouse
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:project: ezgl
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.. doxygenfunction:: scroll_mouse
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:project: ezgl
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Button Action Callbacks
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----------------------
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.. doxygenfunction:: press_zoom_fit
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:project: ezgl
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.. doxygenfunction:: press_zoom_in
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:project: ezgl
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.. doxygenfunction:: press_zoom_out
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:project: ezgl
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Navigation Callbacks
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------------------
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.. doxygenfunction:: press_up
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:project: ezgl
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.. doxygenfunction:: press_down
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:project: ezgl
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.. doxygenfunction:: press_left
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:project: ezgl
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.. doxygenfunction:: press_right
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:project: ezgl
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Other Callbacks
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-------------
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.. doxygenfunction:: press_proceed
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:project: ezgl

‎doc/src/api/ezgl/camera.rst

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======
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Camera
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======
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.. doxygenfile:: camera.hpp
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:project: ezgl

‎doc/src/api/ezgl/canvas.rst

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======
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Canvas
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======
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.. doxygenfile:: canvas.hpp
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:project: ezgl

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