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saaramahmoudisaaramahmoudi
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document some functions in rr_graph.cpp
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‎vpr/src/route/rr_graph.cpp

Lines changed: 63 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -94,8 +94,25 @@ std::set<int> get_layers_pin_is_connected_to(const t_physical_tile_type_ptr type
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///@brief given a specific layer number and type, it returns layers which have same pin_index connected to the given layer
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std::set<int> get_layers_connected_to_pin(const t_physical_tile_type_ptr type, int to_layer, int pin_index);
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97+
///@brief checks whether the channel width has been changed or not
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bool channel_widths_unchanged(const t_chan_width& current, const t_chan_width& proposed);
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/**
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* @brief This routine calculate pin connections to tracks for a specific type on the Fc value defined for each pin in the architecture file.
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* For each type, it will loop through all segments and calculate how many connections should be made, returns the connections for all pins of that type.
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*
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* @param pin_type Specifies whether the routine should connect tracks to *INPUT* pins or connect *OUTPUT* pins to tracks.
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* @param Fc Actual Fc value described in the architecture file for all pins of the specific phyiscal type ([0..number_of_pins-1][0..number_of_segments-1]).
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* @param Type Physical type information, such as total number of pins, block width, block height, and etc.
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* @param type_layer Layer indicies on which the physical type located.
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* @param perturb_switch_pattern Specifies whether connections should be distributed unevenly across the channel or not.
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* @param directionality Segment directionality, should be either *UNI-DIRECTIONAL* or *BI-DIRECTIONAL*
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* @param seg_inf Segments informations, such as length, frequency, and etc.
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* @param sets_per_seg_type Number of available sets within the channel_width of each segment type
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*
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* @return an 5D matrix which keeps the track indicies connected to each pin ([0..num_pins-1][0..width-1][0..height-1][0..layer-1][0..sides-1]).
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*
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*/
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static vtr::NdMatrix<std::vector<int>, 5> alloc_and_load_pin_to_track_map(const e_pin_type pin_type,
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const vtr::Matrix<int>& Fc,
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const t_physical_tile_type_ptr Type,
@@ -104,7 +121,24 @@ static vtr::NdMatrix<std::vector<int>, 5> alloc_and_load_pin_to_track_map(const
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const e_directionality directionality,
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const std::vector<t_segment_inf>& seg_inf,
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const int* sets_per_seg_type);
107-
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/**
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* @brief This routine calculate pin connections to tracks for a specific type and a specific segment based on the Fc value
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* defined for each pin in the architecture file. This routine is called twice for each combination of block type and segment
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* type: 1) connecting tracks to input pins 2) connecting output pins to tracks.
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*
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* @param pin_type Specifies whether the routine should connect tracks to *INPUT* pins or connect *OUTPUT* pins to tracks.
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* @param Fc Actual Fc value described in the architecture file for all pins of the specific phyiscal type ([0..number_of_pins-1][0..number_of_segments-1]).
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* @param seg_type_tracks Number of tracks that is avaliable for the specific segment.
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* @param seg_index The segment index that the function is trying to connect to pins.
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* @param max_Fc Used to allocate max possible space for simplicity.
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* @param Type Physical type information, such as total number of pins, block width, block height, and etc.
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* @param type_layer Layer indicies on which the physical type located.
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* @param perturb_switch_pattern Specifies whether connections should be distributed unevenly across the channel or not.
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* @param directionality Segment directionality, should be either *UNI-DIRECTIONAL* or *BI-DIRECTIONAL*
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*
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* @return an 6D matrix which keeps the track indicies connected to each pin ([0..num_pins-1][0..width-1][0..height-1][0..layer-1][0..sides-1][0..Fc-1]).
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*
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*/
108142
static vtr::NdMatrix<int, 6> alloc_and_load_pin_to_seg_type(const e_pin_type pin_type,
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const vtr::Matrix<int>& Fc,
110144
const int seg_type_tracks,
@@ -297,6 +331,20 @@ static void alloc_and_load_tile_rr_graph(RRGraphBuilder& rr_graph_builder,
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const int delayless_switch);
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299333
static float pattern_fmod(float a, float b);
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336+
/**
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* @brief Loads the tracks_connected_to_pin array with an even distribution of switches across the tracks for each pin.
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*
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* @param tracks_connected_to_pin The funtion loads up this data structure with a track index for each pin ([0..num_pins-1][0..width-1][0..height-1][0..layer-1][0..sides-1][0..Fc-1]]).
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* @param pin_locations Physical pin informations, such as pin_index in the physical type, side, and etc.
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* @param Fc Actual Fc value described in the architecture file for all pins of the specific phyiscal type ([0..number_of_pins-1][0..number_of_segments-1]).
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* @param seg_index The segment index that the function is trying to connect to pins.
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* @param x_chan_width Number of tracks in x-axis.
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* @param y_chan_width Number of tracks in y-axis.
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* @param directionality Segment directionality, should be either *UNI-DIRECTIONAL* or *BI-DIRECTIONAL*
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*
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*/
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static void load_uniform_connection_block_pattern(vtr::NdMatrix<int, 6>& tracks_connected_to_pin,
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const std::vector<t_pin_loc>& pin_locations,
302350
const vtr::Matrix<int>& Fc,
@@ -305,6 +353,18 @@ static void load_uniform_connection_block_pattern(vtr::NdMatrix<int, 6>& tracks_
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const int y_chan_width,
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const enum e_directionality directionality);
307355

356+
/**
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* @brief Loads the tracks_connected_to_pin array with an unevenly distributed set of switches across the channel.
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*
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* @param tracks_connected_to_pin The funtion loads up this data structure with a track index for each pin ([0..num_pins-1][0..width-1][0..height-1][0..layer-1][0..sides-1][0..Fc-1]]).
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* @param pin_locations Physical pin informations, such as pin_index in the physical type, side, and etc.
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* @param x_chan_width Number of tracks in x-axis.
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* @param y_chan_width Number of tracks in y-axis.
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* @param Fc Actual Fc value described in the architecture file for all pins of the specific phyiscal type ([0..number_of_pins-1][0..number_of_segments-1]).
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* @param seg_index The segment index that the function is trying to connect to pins.
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* @param directionality Segment directionality, should be either *UNI-DIRECTIONAL* or *BI-DIRECTIONAL*
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*
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*/
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static void load_perturbed_connection_block_pattern(vtr::NdMatrix<int, 6>& tracks_connected_to_pin,
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const std::vector<t_pin_loc>& pin_locations,
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const int x_chan_width,
@@ -1276,8 +1336,8 @@ static void build_rr_graph(const t_graph_type graph_type,
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/* START IPIN MAP */
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/* Create ipin map lookups */
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1279-
t_pin_to_track_lookup ipin_to_track_map_x(types.size()); /* [0..device_ctx.physical_tile_types.size()-1][0..num_pins-1][0..width][0..height][0..3][0..Fc-1] */
1280-
t_pin_to_track_lookup ipin_to_track_map_y(types.size()); /* [0..device_ctx.physical_tile_types.size()-1][0..max_chan_width-1][0..width][0..height][0..3] */
1339+
t_pin_to_track_lookup ipin_to_track_map_x(types.size()); /* [0..device_ctx.physical_tile_types.size()-1][0..num_pins-1][0..width-1][0..height-1][0..layers-1][0..sides-1][0..Fc-1] */
1340+
t_pin_to_track_lookup ipin_to_track_map_y(types.size()); /* [0..device_ctx.physical_tile_types.size()-1][0..num_pins-1][0..width-1][0..height-1][0..layers-1][0..sides-1][0..Fc-1] */
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t_track_to_pin_lookup track_to_pin_lookup_x(types.size());
12831343
t_track_to_pin_lookup track_to_pin_lookup_y(types.size());
@@ -3339,13 +3399,6 @@ static vtr::NdMatrix<int, 6> alloc_and_load_pin_to_seg_type(const e_pin_type pin
33393399
* If pin ipin on side iside does not exist or is of the wrong type,
33403400
* tracks_connected_to_pin[ipin][iside][0] = OPEN. */
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3342-
/* AA: I think we're currently not doing anything with the ability to specify different Fc values
3343-
* for each segment. Cause we're passing in max_Fc into this function by finding the max_Fc for that
3344-
* segment type by going through Fc[ipin][iseg] (this is a matrix for each type btw, not the overall
3345-
* Fc[itype][ipin][iseg] matrix). Probably should update this to allow finer control over cb along with
3346-
* allowing different specification of the segment parallel_axis.
3347-
*/
3348-
33493402
auto& grid = g_vpr_ctx.device().grid;
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if (Type->num_pins < 1) {

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