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Merge pull request #2430 from verilog-to-routing/separate_flat_router_test
Separate flat router test
2 parents 15c5340 + a812cdb commit 615a48e

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14 files changed

+67
-23
lines changed

14 files changed

+67
-23
lines changed

.github/workflows/test.yml

Lines changed: 17 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -26,22 +26,23 @@ jobs:
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fail-fast: false
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matrix:
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include:
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- {test: "vtr_reg_nightly_test1", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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- {test: "vtr_reg_nightly_test1_odin", cores: "16", options: "", cmake: "-DWITH_PARMYS=OFF -DWITH_ODIN=ON", extra_pkgs: ""}
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- {test: "vtr_reg_nightly_test2", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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- {test: "vtr_reg_nightly_test2_odin", cores: "16", options: "", cmake: "-DWITH_PARMYS=OFF -DWITH_ODIN=ON", extra_pkgs: "" }
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- {test: "vtr_reg_nightly_test3", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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- {test: "vtr_reg_nightly_test3_odin", cores: "16", options: "", cmake: "-DWITH_PARMYS=OFF -DWITH_ODIN=ON", extra_pkgs: ""}
35-
- {test: "vtr_reg_nightly_test4", cores: "16", options: "", cmake: "", extra_pkgs: "" }
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- {test: "vtr_reg_nightly_test4_odin", cores: "16", options: "", cmake: "-DWITH_PARMYS=OFF -DWITH_ODIN=ON", extra_pkgs: "" }
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- {test: "vtr_reg_nightly_test5", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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- {test: "vtr_reg_nightly_test6", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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- {test: "vtr_reg_parmys", cores: "16", options: "", cmake: "", extra_pkgs: "" }
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- {test: "vtr_reg_strong", cores: "16", options: "", cmake: "-DVTR_ASSERT_LEVEL=3", extra_pkgs: "libeigen3-dev"}
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- {test: "vtr_reg_strong_odin", cores: "16", options: "", cmake: "-DVTR_ASSERT_LEVEL=3 -DWITH_PARMYS=OFF -DWITH_ODIN=ON", extra_pkgs: "libeigen3-dev"}
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- {test: "vtr_reg_strong_odin", cores: "16", options: "-skip_qor", cmake: "-DVTR_ASSERT_LEVEL=3 -DVTR_ENABLE_SANITIZE=ON -DWITH_PARMYS=OFF -DWITH_ODIN=ON", extra_pkgs: "libeigen3-dev"}
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- {test: "vtr_reg_system_verilog", cores: "16", options: "", cmake: "-DYOSYS_F4PGA_PLUGINS=ON", extra_pkgs: ""}
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- {test: "odin_reg_strong", cores: "16", options: "", cmake: "-DWITH_PARMYS=OFF -DWITH_ODIN=ON", extra_pkgs: ""}
29+
- {test: "vtr_reg_nightly_test1", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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- {test: "vtr_reg_nightly_test1_odin", cores: "16", options: "", cmake: "-DWITH_ODIN=ON", extra_pkgs: ""}
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- {test: "vtr_reg_nightly_test2", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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- {test: "vtr_reg_nightly_test2_odin", cores: "16", options: "", cmake: "-DWITH_ODIN=ON", extra_pkgs: "" }
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- {test: "vtr_reg_nightly_test3", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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- {test: "vtr_reg_nightly_test3_odin", cores: "16", options: "", cmake: "-DWITH_ODIN=ON", extra_pkgs: ""}
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- {test: "vtr_reg_nightly_test4", cores: "16", options: "", cmake: "", extra_pkgs: "" }
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- {test: "vtr_reg_nightly_test4_odin", cores: "16", options: "", cmake: "-DWITH_ODIN=ON", extra_pkgs: "" }
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- {test: "vtr_reg_nightly_test5", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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- {test: "vtr_reg_nightly_test6", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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- {test: "vtr_reg_nightly_test7", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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- {test: "vtr_reg_parmys", cores: "16", options: "", cmake: "", extra_pkgs: "" }
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- {test: "vtr_reg_strong", cores: "16", options: "", cmake: "-DVTR_ASSERT_LEVEL=3", extra_pkgs: "libeigen3-dev"}
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- {test: "vtr_reg_strong_odin", cores: "16", options: "", cmake: "-DVTR_ASSERT_LEVEL=3 -DWITH_ODIN=ON", extra_pkgs: "libeigen3-dev"}
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- {test: "vtr_reg_strong_odin", cores: "16", options: "-skip_qor", cmake: "-DVTR_ASSERT_LEVEL=3 -DVTR_ENABLE_SANITIZE=ON -DWITH_ODIN=ON", extra_pkgs: "libeigen3-dev"}
44+
- {test: "vtr_reg_system_verilog", cores: "16", options: "", cmake: "-DYOSYS_F4PGA_PLUGINS=ON", extra_pkgs: ""}
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- {test: "odin_reg_strong", cores: "16", options: "", cmake: "-DWITH_ODIN=ON", extra_pkgs: ""}
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env:
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DEBIAN_FRONTEND: "noninteractive"

vtr_flow/tasks/regression_tests/vtr_reg_nightly_test2/task_list.txt

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -2,15 +2,12 @@ regression_tests/vtr_reg_nightly_test2/vtr_reg_netlist_writer
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regression_tests/vtr_reg_nightly_test2/vtr_func_formal
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regression_tests/vtr_reg_nightly_test2/vtr_bidir
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regression_tests/vtr_reg_nightly_test2/vpr_verify_rr_graph
5-
regression_tests/vtr_reg_nightly_test2/vpr_verify_rr_graph_flat_router
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regression_tests/vtr_reg_nightly_test2/vpr_verify_rr_graph_bidir
5+
regression_tests/vtr_reg_nightly_test2/vpr_verify_rr_graph_bidir
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regression_tests/vtr_reg_nightly_test2/vpr_verify_rr_graph_complex_switch
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regression_tests/vtr_reg_nightly_test2/vpr_verify_rr_graph_titan
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regression_tests/vtr_reg_nightly_test2/vpr_verify_rr_graph_error_check
10-
#regression_tests/vtr_reg_nightly_test2/vpr_verify_router_lookahead_flat_router @TODO: fix this test
11-
regression_tests/vtr_reg_nightly_test2/vtr_timing_update_diff
9+
regression_tests/vtr_reg_nightly_test2/vtr_timing_update_diff
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regression_tests/vtr_reg_nightly_test2/vtr_timing_update_diff_titan
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regression_tests/vtr_reg_nightly_test2/vtr_reg_multiclock_mcnc
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regression_tests/vtr_reg_nightly_test2/titan_other
15-
regression_tests/vtr_reg_nightly_test2/titan_other_flat_router
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regression_tests/vtr_reg_nightly_test2/titan_quick_qor
Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,5 @@
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regression_tests/vtr_reg_nightly_test3/vtr_reg_qor_chain
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regression_tests/vtr_reg_nightly_test3/vtr_reg_qor_chain_depop
3-
regression_tests/vtr_reg_nightly_test3/vtr_reg_qor_chain_depop_flat_router
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regression_tests/vtr_reg_nightly_test3/vtr_reg_qor_chain_predictor_off
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regression_tests/vtr_reg_nightly_test3/vtr_reg_qor
6-
regression_tests/vtr_reg_nightly_test3/complex_switch
5+
regression_tests/vtr_reg_nightly_test3/complex_switch
Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,5 @@
1+
regression_tests/vtr_reg_nightly_test7/titan_other_run_flat
2+
#regression_tests/vtr_reg_nightly_test7/vtr_reg_qor_large_run_flat
3+
#regression_tests/vtr_reg_nightly_test7/vtr_reg_qor_large_depop_run_flat
4+
#regression_tests/vtr_reg_nightly_test7/verify_router_lookahead_run_flat
5+
regression_tests/vtr_reg_nightly_test7/verify_rr_graph_run_flat

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