coding style changes

Author: SamuelHo10

vpr/src/draw/draw_basic.cpp

@@ -615,7 +615,7 @@ void draw_partial_route(const std::vector<RRNodeId>& rr_nodes_to_draw, ezgl::ren
     // Draw RR Nodes
     for (size_t i = 1; i < rr_nodes_to_draw.size(); ++i) {
         RRNodeId inode = rr_nodes_to_draw[i];
-        auto rr_type = rr_graph.node_type(inode);
+        e_rr_type rr_type = rr_graph.node_type(inode);
         bool is_inode_inter_cluster = is_inter_cluster_node(rr_graph, inode);
         int node_layer = rr_graph.node_layer(inode);
 
@@ -707,14 +707,14 @@ void draw_partial_route(const std::vector<RRNodeId>& rr_nodes_to_draw, ezgl::ren
             continue;
         }
 
-        draw_inter_cluster_rr_edge(inode, prev_node, rr_type, prev_type, rr_graph, g);
+        draw_inter_cluster_rr_edge(inode, prev_node, rr_type, prev_type, g);
     }
 }
 
-void draw_inter_cluster_rr_edge(RRNodeId inode, RRNodeId prev_node, e_rr_type rr_type, e_rr_type prev_type, const RRGraphView& rr_graph, ezgl::renderer* g) {
-
-    auto iedge = find_edge(prev_node, inode);
-    auto switch_type = rr_graph.edge_switch(RRNodeId(prev_node), iedge);
+void draw_inter_cluster_rr_edge(RRNodeId inode, RRNodeId prev_node, e_rr_type rr_type, e_rr_type prev_type, ezgl::renderer* g) {
+    const RRGraphView& rr_graph = g_vpr_ctx.device().rr_graph;
+    t_edge_size iedge = find_edge(prev_node, inode);
+    short switch_type = rr_graph.edge_switch(RRNodeId(prev_node), iedge);
 
     switch (rr_type) {
         case e_rr_type::IPIN: {

vpr/src/draw/draw_basic.h

@@ -62,7 +62,8 @@ void draw_partial_route(const std::vector<RRNodeId>& rr_nodes_to_draw,
  * @param prev_node The previous rr_node id
  * @param g The ezgl renderer
  */
-void draw_inter_cluster_rr_edge(RRNodeId inode, RRNodeId prev_node, e_rr_type rr_type, e_rr_type prev_type, const RRGraphView& rr_graph, ezgl::renderer* g);
+void draw_inter_cluster_rr_edge(RRNodeId inode, RRNodeId prev_node, e_rr_type rr_type, e_rr_type prev_type, ezgl::renderer* g);
+
 /**
  * @brief Returns the layer number of a timing path node
  * @param node

vpr/src/draw/draw_rr.cpp

@@ -521,9 +521,9 @@ void draw_rr_intra_cluster_pin(RRNodeId inode, const ezgl::color& color, ezgl::r
         return;
     }
 
-    auto blk_id_pin_id = get_rr_node_cluster_blk_id_pb_graph_pin(inode);
+    auto [blk_id, pin_id] = get_rr_node_cluster_blk_id_pb_graph_pin(inode);
 
-    ezgl::point2d p = draw_coords->get_absolute_pin_location(blk_id_pin_id.first, blk_id_pin_id.second);
+    ezgl::point2d p = draw_coords->get_absolute_pin_location(blk_id, pin_id);
 
     int transparency_factor = get_rr_node_transparency(inode);
 
@@ -717,8 +717,8 @@ RRNodeId draw_check_rr_node_hit(float click_x, float click_y) {
                 continue;
             }
 
-            auto blk_id_pin_id = get_rr_node_cluster_blk_id_pb_graph_pin(inode);
-            ezgl::point2d p = draw_coords->get_absolute_pin_location(blk_id_pin_id.first, blk_id_pin_id.second);
+            auto [blk_id, pin_id] = get_rr_node_cluster_blk_id_pb_graph_pin(inode);
+            ezgl::point2d p = draw_coords->get_absolute_pin_location(blk_id, pin_id);
 
             if (click_x >= p.x - draw_coords->pin_size && click_x <= p.x + draw_coords->pin_size && click_y >= p.y - draw_coords->pin_size && click_y <= p.y + draw_coords->pin_size) {
                 hit_node = inode;

vpr/src/draw/draw_rr.h

@@ -31,18 +31,21 @@ void draw_rr_chan(RRNodeId inode, const ezgl::color color, ezgl::renderer* g);
  * @brief Draws the intra-cluster pin for a given RRNodeId when flat routing is enabled.
  */
 void draw_rr_intra_cluster_pin(RRNodeId inode, const ezgl::color& color, ezgl::renderer* g);
+
 /* Draws an IPIN or OPIN rr_node.  Note that the pin can appear on more
  * than one side of a clb.  Also note that this routine can change the
  * current color to BLACK. */
 void draw_cluster_pin(RRNodeId inode, const ezgl::color& color, ezgl::renderer* g);
 
 void draw_rr_src_sink(RRNodeId inode, ezgl::color color, ezgl::renderer* g);
+
 void draw_get_rr_src_sink_coords(const t_rr_node& node, float* xcen, float* ycen);
 
 /* Draws a buffer (triangle) or pass transistor (circle) on the edge
  * connecting from to to, depending on the status of buffered.  The drawing
  * is closest to the from_node, since it reflects the switch type of from.  */
 void draw_rr_switch(float from_x, float from_y, float to_x, float to_y, bool buffered, bool switch_configurable, ezgl::renderer* g);
+
 void draw_expand_non_configurable_rr_nodes_recurr(RRNodeId from_node,
                                                   std::set<RRNodeId>& expanded_nodes);
 

vpr/src/draw/draw_rr_edges.h

@@ -46,6 +46,7 @@ void draw_chanx_to_chany_edge(RRNodeId chanx_node, RRNodeId chany_node, enum e_c
  * @param g The ezgl renderer
  */
 void draw_intra_cluster_pin_to_pin(RRNodeId intra_cluster_node, RRNodeId inter_cluster_node, e_pin_edge_dir pin_edge_dir, e_side pin_side, ezgl::renderer* g);
+
 /**
  * @brief Draws the edge between two intra-cluster pins when flat routing is enabled.
  * @param inode The current node to draw to
@@ -61,6 +62,7 @@ void draw_pin_to_pin(RRNodeId opin, RRNodeId ipin, ezgl::renderer* g);
 
 //TODO: These two functions currently do not draw correctly after rearranging the block locations. They need an update.
 void draw_pin_to_sink(RRNodeId ipin_node, RRNodeId sink_node, ezgl::renderer* g);
+
 void draw_source_to_pin(RRNodeId source_node, RRNodeId opin_node, ezgl::renderer* g);
 
 /**
@@ -70,6 +72,7 @@ void draw_source_to_pin(RRNodeId source_node, RRNodeId opin_node, ezgl::renderer
  * @return The side of the clb that the pin is located on (e.g. TOP, RIGHT, BOTTOM, LEFT)
  */
 e_side get_pin_side(RRNodeId pin_node, RRNodeId chan_node);
+
 /**
  * @brief Draws an edge from a inter-cluster pin node to a channel node (CHANX or CHANY).
  */

vpr/src/draw/draw_searchbar.cpp

@@ -136,17 +136,17 @@ void highlight_nets(char* message, RRNodeId hit_node) {
     auto& atom_ctx = g_vpr_ctx.atom();
     auto& route_ctx = g_vpr_ctx.routing();
 
-    /* Don't crash if there's no routing */
+    // Don't crash if there's no routing
     if (route_ctx.route_trees.empty())
         return;
 
     if (route_ctx.is_flat) {
-        for (auto net_id : atom_ctx.netlist().nets()) {
+        for (AtomNetId net_id : atom_ctx.netlist().nets()) {
             check_node_highlight_net(message, net_id, hit_node);
         }
 
     } else {
-        for (auto net_id : cluster_ctx.clb_nlist.nets()) {
+        for (ClusterNetId net_id : cluster_ctx.clb_nlist.nets()) {
             check_node_highlight_net(message, net_id, hit_node);
         }
     }
@@ -169,7 +169,7 @@ void check_node_highlight_net(char* message, ParentNetId parent_net_id, RRNodeId
     if (!route_ctx.route_trees[parent_net_id])
         return;
 
-    for (auto& rt_node : route_ctx.route_trees[parent_net_id].value().all_nodes()) {
+    for (RouteTreeNode& rt_node : route_ctx.route_trees[parent_net_id].value().all_nodes()) {
         RRNodeId inode = rt_node.inode;
         if (draw_state->draw_rr_node[inode].color == ezgl::MAGENTA) {
             draw_state->net_color[parent_net_id] = draw_state->draw_rr_node[inode].color;
@@ -179,8 +179,7 @@ void check_node_highlight_net(char* message, ParentNetId parent_net_id, RRNodeId
                         size_t(parent_net_id),
                         draw_get_net_name(parent_net_id).c_str());
             }
-        } else if (draw_state->draw_rr_node[inode].color
-                   == ezgl::WHITE) {
+        } else if (draw_state->draw_rr_node[inode].color == ezgl::WHITE) {
             // If node is de-selected.
             draw_state->net_color[parent_net_id] = ezgl::BLACK;
             break;

vpr/src/draw/draw_types.h

@@ -109,6 +109,7 @@ enum e_draw_net_type {
     ALL_NETS,
     HIGHLIGHTED
 };
+
 /// Chanx to chany or vice versa?
 enum e_chan_edge_dir {
     FROM_X_TO_Y,