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libs/libarchfpga/src/physical_types.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2284,7 +2284,7 @@ struct t_arch {
22842284
char* architecture_id;
22852285

22862286
// Options for tileable routing architectures
2287-
// These are used for an alternative, tilable, rr-graph generator that can produce
2287+
// These are used for an alternative, tilable, rr-graph generator that can produce
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// OpenFPGA-compatible FPGAs that can be implemented to silicon via the OpenFPGA flow
22892289

22902290
/// Whether the routing architecture is tileable

libs/libarchfpga/src/read_xml_arch_file.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2937,7 +2937,7 @@ static void process_device(pugi::xml_node Node, t_arch* arch, t_default_fc_spec&
29372937
}
29382938

29392939
process_tileable_device_parameters(arch, loc_data);
2940-
2940+
29412941
ReqOpt custom_switchblock_reqd = BoolToReqOpt(!custom_switch_block);
29422942
arch->Fs = get_attribute(Cur, "fs", loc_data, custom_switchblock_reqd).as_int(3);
29432943

@@ -2954,11 +2954,11 @@ static void process_device(pugi::xml_node Node, t_arch* arch, t_default_fc_spec&
29542954
static void process_tileable_device_parameters(t_arch* arch, const pugiutil::loc_data& loc_data) {
29552955
pugi::xml_node cur;
29562956

2957-
// Parse attribute 'sub_type', representing the minor connectivity pattern for switch blocks
2957+
// Parse attribute 'sub_type', representing the minor connectivity pattern for switch blocks
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// If not specified, the 'sub_type' is the same as major type
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// This option is only valid for tileable routing resource graph builder
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// Note that sub_type does not support custom switch block pattern!!!
2961-
// If 'sub_type' is specified, the custom switch block for 'type' is not allowed!
2961+
// If 'sub_type' is specified, the custom switch block for 'type' is not allowed!
29622962
std::string sub_type_str = get_attribute(cur, "sub_type", loc_data, BoolToReqOpt(false)).as_string("");
29632963
if (!sub_type_str.empty()) {
29642964
if (sub_type_str == "wilton") {

libs/libarchfpga/src/vib_inf.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -151,10 +151,10 @@ class VibInf {
151151
size_t mux_index_by_name(const std::string& name) const;
152152

153153
private:
154-
/// The name of the VIB type, "vib0" in the example.
154+
/// The name of the VIB type, "vib0" in the example.
155155
std::string name_;
156156

157-
/// The pbtype of the VIB, "clb" in the example.
157+
/// The pbtype of the VIB, "clb" in the example.
158158
std::string pbtype_name_;
159159

160160
/// The number of segment groups.

libs/librrgraph/src/base/rr_graph_view.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -79,7 +79,7 @@ RRSegmentId RRGraphView::node_segment(RRNodeId node) const {
7979

8080
size_t RRGraphView::in_edges_count() const {
8181
size_t edge_count = 0;
82-
for (const std::vector<RRwEdgeId>& edge_list : node_in_edges_) {
82+
for (const std::vector<RREdgeId>& edge_list : node_in_edges_) {
8383
edge_count += edge_list.size();
8484
}
8585
return edge_count;

vpr/src/base/place_and_route.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -287,9 +287,9 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list,
287287

288288
// The binary search above occasionally does not find the minimum routeable channel width.
289289
// Sometimes a circuit that will not route in 19 channels will route in 18, due to router flukiness.
290-
// If verify_binary_search is set, the code below will ensure that FPGAs with channel widths of
290+
// If verify_binary_search is set, the code below will ensure that FPGAs with channel widths of
291291
// final-2 and final-3 wil not route successfully.
292-
// If one does route successfully, the router keeps trying smaller channel widths until two in a
292+
// If one does route successfully, the router keeps trying smaller channel widths until two in a
293293
// row (e.g. 8 and 9) fail.
294294

295295
if (verify_binary_search) {

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