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Merge branch 'master' of https://github.com/verilog-to-routing/vtr-verilog-to-routing into add_tileable_rr_graph
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.github/workflows/nightly_test_manual.yml

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -50,6 +50,7 @@ jobs:
5050
make get_ispd_benchmarks
5151
./dev/upgrade_vtr_archs.sh
5252
make get_symbiflow_benchmarks
53+
make get_zeroasic_rr_graphs
5354
5455
# Build VTR using the default build options.
5556
- name: 'Build VTR'
@@ -133,4 +134,4 @@ jobs:
133134
with:
134135
name: nightly_tests_golden
135136
path: |
136-
vtr_flow/**/vtr_reg_nightly*/**/golden_results.txt
137+
vtr_flow/**/vtr_reg_nightly*/**/golden_results.txt

CMakeLists.txt

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -360,6 +360,14 @@ add_custom_target(get_symbiflow_benchmarks
360360
WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}
361361
COMMENT "Downloading (~100MB) and extracting SymbiFlow architectures (~2.7GB) into VTR source tree.")
362362

363+
#
364+
# Zero ASIC RR Graph Files
365+
#
366+
add_custom_target(get_zeroasic_rr_graphs
367+
COMMAND ./vtr_flow/scripts/get_zeroasic_rr_graphs.py --vtr_flow_dir ./vtr_flow
368+
WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}
369+
COMMENT "Downloading (~2MB) and extracting Zero ASIC RR graphs (~0.1GB) into VTR source tree.")
370+
363371
#
364372
# Unit Testing
365373
#

doc/src/vpr/command_line_usage.rst

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -810,6 +810,22 @@ If any of init_t, exit_t or alpha_t is specified, the user schedule, with a fixe
810810

811811
**Default:** ``circuit``
812812

813+
.. option:: --anneal_auto_init_t_scale <float>
814+
815+
A scale on the starting temperature of the anneal for the automatic annealing
816+
schedule.
817+
818+
When in the automatic annealing schedule, the annealer will select a good
819+
initial temperature based on the quality of the initial placement. This option
820+
allows you to scale that initial temperature up or down by multiplying the
821+
initial temperature by the given scale. Increasing this number
822+
will increase the initial temperature which will have the annealer potentially
823+
explore more of the space at the expense of run time. Depending on the quality
824+
of the initial placement, this may improve or hurt the quality of the final
825+
placement.
826+
827+
**Default:** ``1.0``
828+
813829
.. option:: --init_t <float>
814830

815831
The starting temperature of the anneal for the manual annealing schedule.
@@ -1824,6 +1840,20 @@ The following options are only valid when the router is in timing-driven mode (t
18241840

18251841
**Default:** ``map``
18261842

1843+
.. option:: --router_initial_acc_cost_chan_congestion_threshold <float>
1844+
1845+
Utilization threshold above which initial accumulated routing cost (acc_cost) is increased to penalize congested channels.
1846+
Used to bias routing away from highly utilized regions during early routing iterations.
1847+
1848+
**Default:** ``0.5``
1849+
1850+
.. option:: --router_initial_acc_cost_chan_congestion_weight <float>
1851+
Weight applied to the excess channel utilization (above threshold) when computing the initial accumulated cost (acc_cost)of routing resources.
1852+
1853+
Higher values make the router more sensitive to early congestion.
1854+
1855+
**Default:** ``0.5``
1856+
18271857
.. option:: --router_max_convergence_count <float>
18281858

18291859
Controls how many times the router is allowed to converge to a legal routing before halting.

libs/librrgraph/src/base/check_rr_graph.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -54,9 +54,9 @@ void check_rr_graph(const RRGraphView& rr_graph,
5454
const t_chan_width& chan_width,
5555
const e_graph_type graph_type,
5656
bool is_flat) {
57-
e_route_type route_type = DETAILED;
57+
e_route_type route_type = e_route_type::DETAILED;
5858
if (graph_type == e_graph_type::GLOBAL) {
59-
route_type = GLOBAL;
59+
route_type = e_route_type::GLOBAL;
6060
}
6161

6262
auto total_edges_to_node = std::vector<int>(rr_graph.num_nodes());
@@ -424,7 +424,7 @@ void check_rr_node(const RRGraphView& rr_graph,
424424
VPR_FATAL_ERROR(VPR_ERROR_ROUTE,
425425
"in check_rr_node: CHANX out of range for endpoints (%d,%d) and (%d,%d)\n", xlow, ylow, xhigh, yhigh);
426426
}
427-
if (route_type == GLOBAL && xlow != xhigh) {
427+
if (route_type == e_route_type::GLOBAL && xlow != xhigh) {
428428
VPR_ERROR(VPR_ERROR_ROUTE,
429429
"in check_rr_node: node %d spans multiple channel segments (not allowed for global routing).\n", inode);
430430
}
@@ -435,7 +435,7 @@ void check_rr_node(const RRGraphView& rr_graph,
435435
VPR_FATAL_ERROR(VPR_ERROR_ROUTE,
436436
"Error in check_rr_node: CHANY out of range for endpoints (%d,%d) and (%d,%d)\n", xlow, ylow, xhigh, yhigh);
437437
}
438-
if (route_type == GLOBAL && ylow != yhigh) {
438+
if (route_type == e_route_type::GLOBAL && ylow != yhigh) {
439439
VPR_ERROR(VPR_ERROR_ROUTE,
440440
"in check_rr_node: node %d spans multiple channel segments (not allowed for global routing).\n", inode);
441441
}
@@ -502,7 +502,7 @@ void check_rr_node(const RRGraphView& rr_graph,
502502

503503
case e_rr_type::CHANX:
504504
case e_rr_type::CHANY:
505-
if (route_type == DETAILED) {
505+
if (route_type == e_route_type::DETAILED) {
506506
nodes_per_chan = chan_width.max;
507507
tracks_per_node = 1;
508508
} else {

libs/librrgraph/src/base/rr_graph_builder.cpp

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -39,13 +39,9 @@ void RRGraphBuilder::add_node_to_all_locs(RRNodeId node) {
3939
e_rr_type node_type = node_storage_.node_type(node);
4040
short node_ptc_num = node_storage_.node_ptc_num(node);
4141
short node_layer = node_storage_.node_layer(node);
42-
short node_twist = node_storage_.node_ptc_twist(node);
43-
int node_offset = 0;
4442

4543
for (int ix = node_storage_.node_xlow(node); ix <= node_storage_.node_xhigh(node); ix++) {
4644
for (int iy = node_storage_.node_ylow(node); iy <= node_storage_.node_yhigh(node); iy++) {
47-
node_ptc_num += node_twist * node_offset;
48-
node_offset++;
4945

5046
switch (node_type) {
5147
case e_rr_type::SOURCE:

libs/librrgraph/src/base/rr_graph_builder.h

Lines changed: 0 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -230,10 +230,6 @@ class RRGraphBuilder {
230230
node_storage_.set_node_layer(id, layer);
231231
}
232232

233-
/** @brief set the ptc twist increment number for TILEABLE rr graphs (for more information see rr_graph_storage.h twist increment comment) */
234-
inline void set_node_ptc_twist_incr(RRNodeId id, int twist){
235-
node_storage_.set_node_ptc_twist_incr(id, twist);
236-
}
237233

238234
/** @brief set_node_pin_num() is designed for logic blocks, which are IPIN and OPIN nodes */
239235
inline void set_node_pin_num(RRNodeId id, int new_pin_num) {
@@ -401,11 +397,6 @@ class RRGraphBuilder {
401397
}
402398

403399

404-
/** @brief This function resize node ptc twist increment; Since it is only used for tileable rr-graph, we don't put it in general resize function*/
405-
inline void resize_ptc_twist_incr(size_t size){
406-
node_storage_.resize(size);
407-
}
408-
409400
/** @brief This function resize rr_switch to accomidate size RR Switch. */
410401
inline void resize_switches(size_t size) {
411402
rr_switch_inf_.resize(size);

libs/librrgraph/src/base/rr_graph_storage.cpp

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -643,11 +643,6 @@ void t_rr_graph_storage::set_node_layer(RRNodeId id, short layer) {
643643
node_layer_[id] = layer;
644644
}
645645

646-
void t_rr_graph_storage::set_node_ptc_twist_incr(RRNodeId id, short twist_incr){
647-
VTR_ASSERT(!node_ptc_twist_incr_.empty());
648-
node_ptc_twist_incr_[id] = twist_incr;
649-
}
650-
651646
void t_rr_graph_storage::set_node_ptc_num(RRNodeId id, int new_ptc_num) {
652647
node_ptc_[id].ptc_.pin_num = new_ptc_num; //TODO: eventually remove
653648
}
@@ -864,7 +859,6 @@ t_rr_graph_view t_rr_graph_storage::view() const {
864859
vtr::make_const_array_view_id(node_fan_in_),
865860
vtr::make_const_array_view_id(node_layer_),
866861
node_name_,
867-
vtr::make_const_array_view_id(node_ptc_twist_incr_),
868862
vtr::make_const_array_view_id(edge_src_node_),
869863
vtr::make_const_array_view_id(edge_dest_node_),
870864
vtr::make_const_array_view_id(edge_switch_),

libs/librrgraph/src/base/rr_graph_storage.h

Lines changed: 1 addition & 47 deletions
Original file line numberDiff line numberDiff line change
@@ -260,18 +260,6 @@ class t_rr_graph_storage {
260260
return std::nullopt; // Return an empty optional if key is not found
261261
}
262262

263-
/** @brief Find the twist number that RR node uses to change ptc number across the same track.
264-
* By default this number is zero, meaning that ptc number across the same track should be the same.
265-
* This number is only meaningful for CHANX/CHANY nodes, not the other nodes.
266-
*/
267-
short node_ptc_twist(RRNodeId id) const{
268-
//check whether node_ptc_twist_incr has been allocated
269-
if(node_ptc_twist_incr_.empty()){
270-
return 0;
271-
}
272-
return node_ptc_twist_incr_[id];
273-
}
274-
275263
/**
276264
* @brief Returns the node ID of the virtual sink for the specified clock network name.
277265
*
@@ -525,7 +513,6 @@ class t_rr_graph_storage {
525513
node_ptc_.reserve(node_storage_.capacity());
526514
node_ptc_.resize(node_storage_.size());
527515
node_layer_.resize(node_storage_.size());
528-
node_ptc_twist_incr_.resize(node_storage_.size());
529516
node_bend_start_.resize(node_storage_.size());
530517
node_bend_end_.resize(node_storage_.size());
531518
}
@@ -552,11 +539,6 @@ class t_rr_graph_storage {
552539
node_bend_end_.resize(size);
553540
}
554541

555-
/** @brief We only allocate the ptc twist increment array while building tileable rr-graphs */
556-
void resize_ptc_twist_incr(size_t size){
557-
node_ptc_twist_incr_.resize(size);
558-
}
559-
560542
/** @brief Number of RR nodes that can be accessed. */
561543
size_t size() const {
562544
return node_storage_.size();
@@ -580,7 +562,6 @@ class t_rr_graph_storage {
580562
node_bend_end_.clear();
581563
node_name_.clear();
582564
virtual_clock_network_root_idx_.clear();
583-
node_ptc_twist_incr_.clear();
584565
edge_src_node_.clear();
585566
edge_dest_node_.clear();
586567
edge_switch_.clear();
@@ -616,7 +597,7 @@ class t_rr_graph_storage {
616597
node_layer_.shrink_to_fit();
617598
node_bend_start_.shrink_to_fit();
618599
node_bend_end_.shrink_to_fit();
619-
node_ptc_twist_incr_.shrink_to_fit();
600+
620601
edge_src_node_.shrink_to_fit();
621602
edge_dest_node_.shrink_to_fit();
622603
edge_switch_.shrink_to_fit();
@@ -654,7 +635,6 @@ class t_rr_graph_storage {
654635
void set_node_name(RRNodeId id, const std::string& new_name);
655636
void set_node_coordinates(RRNodeId id, short x1, short y1, short x2, short y2);
656637
void set_node_layer(RRNodeId id, short layer);
657-
void set_node_ptc_twist_incr(RRNodeId id, short twist);
658638
void set_node_cost_index(RRNodeId, RRIndexedDataId new_cost_index);
659639
void set_node_bend_start(RRNodeId id, size_t bend_start);
660640
void set_node_bend_end(RRNodeId id, size_t bend_end);
@@ -909,15 +889,6 @@ class t_rr_graph_storage {
909889
*/
910890
std::unordered_map<std::string, RRNodeId> virtual_clock_network_root_idx_;
911891

912-
/** @brief
913-
*Twist Increment number is defined for CHANX/CHANY nodes; it is useful for layout of tileable FPGAs used by openFPGA.
914-
*It gives us a new track index in each tile a longer wire crosses, which enables us to make long wires with a repeated single-tile pattern that "twists" the wires as they cross the tile.
915-
*For example, an L4 wire would change tracks 4 times with metal shorts [e.g. 0, 2, 4, 6] and track 6 would drive a switch -- together this implements an L4 wire with only one layout tile.
916-
* Twist increment number is only meaningful for CHANX and CHANY nodes; it is 0 for other node types.
917-
* We also don't bother allocating this storage if the FPGA is not specified to be tileable; instead in that case the twist for all nodes will always be returned as 0.
918-
*/
919-
vtr::vector<RRNodeId, short> node_ptc_twist_incr_;
920-
921892
/** @brief Edge storage */
922893
vtr::vector<RREdgeId, RRNodeId> edge_src_node_;
923894
vtr::vector<RREdgeId, RRNodeId> edge_dest_node_;
@@ -999,7 +970,6 @@ class t_rr_graph_view {
999970
const vtr::array_view_id<RRNodeId, const t_edge_size> node_fan_in,
1000971
const vtr::array_view_id<RRNodeId, const short> node_layer,
1001972
const std::unordered_map<RRNodeId, std::string>& node_name,
1002-
const vtr::array_view_id<RRNodeId, const short> node_ptc_twist_incr,
1003973
const vtr::array_view_id<RREdgeId, const RRNodeId> edge_src_node,
1004974
const vtr::array_view_id<RREdgeId, const RRNodeId> edge_dest_node,
1005975
const vtr::array_view_id<RREdgeId, const short> edge_switch,
@@ -1012,7 +982,6 @@ class t_rr_graph_view {
1012982
, node_fan_in_(node_fan_in)
1013983
, node_layer_(node_layer)
1014984
, node_name_(node_name)
1015-
, node_ptc_twist_incr_(node_ptc_twist_incr)
1016985
, edge_src_node_(edge_src_node)
1017986
, edge_dest_node_(edge_dest_node)
1018987
, edge_switch_(edge_switch)
@@ -1105,20 +1074,6 @@ class t_rr_graph_view {
11051074
return std::nullopt; // Return an empty optional if key is not found
11061075
}
11071076

1108-
/**
1109-
* @brief Retrieve the twist number (if available) that the given RRNodeId used for its PTC number.
1110-
*
1111-
* @param id The RRNodeId for which to retrieve the twist number.
1112-
* @return The twist number used for the PTC number, or a default value if not available.
1113-
*/
1114-
short node_ptc_twist_incr(RRNodeId id) const{
1115-
//check if ptc twist increment allocated
1116-
if(node_ptc_twist_incr_.empty()){
1117-
return 0; //if it is not allocated we just assume that is zero
1118-
}
1119-
return node_ptc_twist_incr_[id];
1120-
}
1121-
11221077
/**
11231078
* @brief Prefetches hot RR node data required for optimization.
11241079
*
@@ -1233,7 +1188,6 @@ class t_rr_graph_view {
12331188
vtr::array_view_id<RRNodeId, const t_edge_size> node_fan_in_;
12341189
vtr::array_view_id<RRNodeId, const short> node_layer_;
12351190
const std::unordered_map<RRNodeId, std::string>& node_name_;
1236-
vtr::array_view_id<RRNodeId, const short> node_ptc_twist_incr_;
12371191
vtr::array_view_id<RREdgeId, const RRNodeId> edge_src_node_;
12381192
vtr::array_view_id<RREdgeId, const RRNodeId> edge_dest_node_;
12391193
vtr::array_view_id<RREdgeId, const short> edge_switch_;

libs/librrgraph/src/base/rr_graph_type.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,8 @@ struct t_chan_width {
1313
std::vector<int> y_list;
1414
};
1515

16-
enum e_route_type {
16+
/// @brief Specifies whether global routing or combined global and detailed routing is performed.
17+
enum class e_route_type {
1718
GLOBAL,
1819
DETAILED
1920
};

libs/librrgraph/src/base/rr_graph_view.h

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -247,11 +247,6 @@ class RRGraphView {
247247
inline short node_bend_end(RRNodeId node) const {
248248
return node_storage_.node_bend_end(node);
249249
}
250-
251-
/** @brief Return the ptc number twist of a specified node. */
252-
inline short node_ptc_twist(RRNodeId node) const{
253-
return node_storage_.node_ptc_twist(node);
254-
}
255250

256251
/** @brief Return the first outgoing edge of a specified node.
257252
*/

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