The `segmentation fault` is encountered when running the RTL simulation

[zhangkanqi]

Background Work

• Yes, I searched the mailing list
• Yes, I searched prior issues
• Yes, I searched the documentation

Chipyard Version and Hash

Release: 1.11.0
Hash: ac58f38

OS Setup

Linux hwfuzz 5.15.0-91-generic #101~20.04.1-Ubuntu SMP Thu Nov 16 14:22:28 UTC 2023 x86_64 GNU/Linux

Other Setup

verilator --version: Verilator 5.002 2022-10-29 rev v5.002

Current Behavior

After ran the following commands, i successfully got the executable binary simulator-chipyard.harness-SmallBoomConfig-debug.

(/home/zhangkanqi/chipyard/.conda-env) zhangkanqi@hwfuzz:~/chipyard/sims/verilator$ time make  debug CONFIG=SmallBoomConfig

However, when run simulator-chipyard.harness-SmallBoomConfig-debug, it report Segmentation fault.

(/home/zhangkanqi/chipyard/.conda-env) zhangkanqi@hwfuzz:~/chipyard/sims/verilator$ ./simulator-chipyard.harness-SmallBoomConfig-debug --help
Segmentation fault (core dumped)

Expected Behavior

When run ./simulator-chipyard.harness-SmallBoomConfig-debug --help, the help message is expected to be displayed.

Other Information

No response

[zhangkanqi]

When I tried time make run-binary-debug BINARY=./qsort.riscv, qsort.riscv is from riscv-tests. But it still report "segmentation fault":

Running with RISCV=/home/zhangkanqi/chipyard/.conda-env/riscv-tools
if [ "qsort.riscv" != "none" ] && [ ! -f "qsort.riscv" ]; then printf "\n\nBinary qsort.riscv not found\n\n"; exit 1; fi
if [ "qsort.riscv" != "none" ]; then riscv64-unknown-elf-objdump -D -S qsort.riscv > /home/zhangkanqi/chipyard/sims/verilator/output/chipyard.harness.TestHarness.RocketConfig/qsort.dump ; fi
(set -o pipefail && /home/zhangkanqi/chipyard/sims/verilator/simulator-chipyard.harness-RocketConfig-debug +permissive +dramsim +dramsim_ini_dir=/home/zhangkanqi/chipyard/generators/testchipip/src/main/resources/dramsim2_ini +max-cycles=10000000 +verbose +vcdfile=/home/zhangkanqi/chipyard/sims/verilator/output/chipyard.harness.TestHarness.RocketConfig/qsort.vcd +permissive-off qsort.riscv </dev/null 2> >(spike-dasm > /home/zhangkanqi/chipyard/sims/verilator/output/chipyard.harness.TestHarness.RocketConfig/qsort.out) | tee /home/zhangkanqi/chipyard/sims/verilator/output/chipyard.harness.TestHarness.RocketConfig/qsort.log)
/bin/bash: line 1: 1290259 Segmentation fault (core dumped) /home/zhangkanqi/chipyard/sims/verilator/simulator-chipyard.harness-RocketConfig-debug +permissive +dramsim +dramsim_ini_dir=/home/zhangkanqi/chipyard/generators/testchipip/src/main/resources/dramsim2_ini +max-cycles=10000000 +verbose +vcdfile=/home/zhangkanqi/chipyard/sims/verilator/output/chipyard.harness.TestHarness.RocketConfig/qsort.vcd +permissive-off qsort.riscv < /dev/null 2> >(spike-dasm > /home/zhangkanqi/chipyard/sims/verilator/output/chipyard.harness.TestHarness.RocketConfig/qsort.out)
1290260 Done | tee /home/zhangkanqi/chipyard/sims/verilator/output/chipyard.harness.TestHarness.RocketConfig/qsort.log
make: *** [/home/zhangkanqi/chipyard/common.mk:387: qsort.riscv.run.debug] Error 139

[Fi50]

Hello! Is there a reason you're using 1.11.0? Could you switch to latest main and see if you still get the same?