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lines changed- CHANGELOG.md+5
- README.md+2-3
- docs/datasheet/cpu.adoc+25-35
- docs/datasheet/cpu_csr.adoc+16-54
- docs/datasheet/cpu_dual_core.adoc+8-45
- docs/datasheet/overview.adoc+1-3
- docs/datasheet/soc.adoc+2-6
- docs/datasheet/soc_hwspinlock.adoc-50
- docs/datasheet/soc_spi.adoc+25-2
- docs/datasheet/soc_sysinfo.adoc+32-32
- docs/datasheet/soc_xbus.adoc+10-6
- docs/datasheet/software.adoc+48-3
- docs/figures/README.md-4
- docs/figures/SPI_timing_diagram2.wikimedia.png
- docs/figures/address_space.png
- docs/figures/neorv32_processor.png
- docs/figures/ram_layout.png
- docs/figures/smp_system.png
- docs/figures/twd_sequences.png
- docs/references/wbspec_b4.pdf
- rtl/core/neorv32_bootloader_image.vhd+108-115
- rtl/core/neorv32_bus.vhd+17-15
- rtl/core/neorv32_cache.vhd+21-19
- rtl/core/neorv32_cpu.vhd+2-34
- rtl/core/neorv32_cpu_control.vhd+7-19
- rtl/core/neorv32_cpu_counters.vhd-3
- rtl/core/neorv32_cpu_frontend.vhd+2-1
- rtl/core/neorv32_cpu_icc.vhd-91
- rtl/core/neorv32_cpu_lsu.vhd+3-2
- rtl/core/neorv32_dma.vhd+3-2
- rtl/core/neorv32_hwspinlock.vhd-76
- rtl/core/neorv32_package.vhd+6-23
- rtl/core/neorv32_pwm.vhd+2-2
- rtl/core/neorv32_sys.vhd-3
- rtl/core/neorv32_sysinfo.vhd+2-3
- rtl/core/neorv32_top.vhd+8-47
- rtl/core/neorv32_xbus.vhd+1-1
- rtl/file_list_cpu.f-1
- rtl/file_list_soc.f-2
- rtl/system_integration/neorv32_vivado_ip.tcl+99-66
- rtl/system_integration/neorv32_vivado_ip.vhd+2-4
- sim/neorv32_tb.vhd+1-2
- sim/xbus_memory.vhd+19-8
- sw/bootloader/hal/include/spi_flash.h+2-2
- sw/bootloader/hal/include/twi_flash.h+1
- sw/bootloader/hal/source/twi_flash.c+20-10
- sw/bootloader/main.c+32-33
- sw/common/crt0.S+15-24
- sw/common/neorv32.ld+2-5
- sw/example/bus_explorer/main.c+193-108
- sw/example/demo_dual_core/spinlock.c+1-1
- sw/example/demo_dual_core_hwspinlock/Makefile-33
- sw/example/demo_dual_core_hwspinlock/main.c-110
- sw/example/demo_dual_core_icc/Makefile-33
- sw/example/demo_dual_core_icc/main.c-158
- sw/example/demo_dual_core_primes/Makefile+1-1
- sw/example/demo_dual_core_primes/main.c+14-6
- sw/example/demo_trng/main.c+67
- sw/example/processor_check/main.c+127-132
- sw/lib/include/neorv32.h+34-35
- sw/lib/include/neorv32_hwspinlock.h-48
- sw/lib/include/neorv32_smp.h+1-53
- sw/lib/include/neorv32_sysinfo.h+1-1
- sw/lib/source/neorv32_aux.c+19-20
- sw/lib/source/neorv32_hwspinlock.c-92
- sw/lib/source/neorv32_smp.c+17-65
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