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fpistmfpistm
authoredApr 30, 2024
Merge pull request #2353 from fpistm/STM32CubeWBA_update
chore(wba): update to latest STM32CubeWBA v1.3.1
2 parents 0588a96 + a887b4d commit f31d070

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‎system/Drivers/CMSIS/Device/ST/STM32WBAxx/Include/stm32wba50xx.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10295,6 +10295,10 @@ typedef struct
1029510295
#define IS_TIM_OCXREF_CLEAR_INSTANCE(INSTANCE) (((INSTANCE) == TIM1_NS) || \
1029610296
((INSTANCE) == TIM2_NS))
1029710297

10298+
/********* TIM Instances : supporting bitfield OCCS in SMCR register **********/
10299+
#define IS_TIM_OCCS_INSTANCE(INSTANCE) (((INSTANCE) == TIM1_NS) || \
10300+
((INSTANCE) == TIM2_NS))
10301+
1029810302
/****************** TIM Instances : remapping capability **********************/
1029910303
#define IS_TIM_REMAP_INSTANCE(INSTANCE) (((INSTANCE) == TIM1_NS) || \
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((INSTANCE) == TIM2_NS))

‎system/Drivers/CMSIS/Device/ST/STM32WBAxx/Include/stm32wba52xx.h

Lines changed: 23 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -14343,8 +14343,7 @@ typedef struct
1434314343
((INSTANCE) == TIM17_NS) || ((INSTANCE) == TIM17_S))
1434414344

1434514345
/****************** TIM Instances : supporting 32 bits counter ****************/
14346-
#define IS_TIM_32B_COUNTER_INSTANCE(INSTANCE) ((((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S)) || \
14347-
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S))
14346+
#define IS_TIM_32B_COUNTER_INSTANCE(INSTANCE) (((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S))
1434814347

1434914348
/****************** TIM Instances : supporting the break function *************/
1435014349
#define IS_TIM_BREAK_INSTANCE(INSTANCE) (((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
@@ -14530,6 +14529,11 @@ typedef struct
1453014529
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
1453114530
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S))
1453214531

14532+
/****************** TIM Instances : supporting bitfield OCCS in SMCR register *******************/
14533+
#define IS_TIM_OCCS_INSTANCE(INSTANCE) (((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
14534+
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
14535+
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S))
14536+
1453314537
/****************** TIM Instances : remapping capability **********************/
1453414538
#define IS_TIM_REMAP_INSTANCE(INSTANCE) (((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
1453514539
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
@@ -14563,9 +14567,9 @@ typedef struct
1456314567
#define IS_TIM_ADVANCED_INSTANCE(INSTANCE) (((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S))
1456414568

1456514569
/****************** TIM Instances : supporting synchronization ****************/
14566-
#define IS_TIM_SYNCHRO_INSTANCE(__INSTANCE__) (((__INSTANCE__) == TIM1_NS) || ((__INSTANCE__) == TIM1_S) || \
14567-
((__INSTANCE__) == TIM2_NS) || ((__INSTANCE__) == TIM2_S) || \
14568-
((__INSTANCE__) == TIM3_NS) || ((__INSTANCE__) == TIM3_S))
14570+
#define IS_TIM_SYNCHRO_INSTANCE(INSTANCE) (((INSTANCE) == TIM1_NS) || ((INSTANCE) == TIM1_S) || \
14571+
((INSTANCE) == TIM2_NS) || ((INSTANCE) == TIM2_S) || \
14572+
((INSTANCE) == TIM3_NS) || ((INSTANCE) == TIM3_S))
1456914573

1457014574
/****************************** TSC Instances *********************************/
1457114575
#define IS_TSC_ALL_INSTANCE(INSTANCE) (((INSTANCE) == TSC_NS) || ((INSTANCE) == TSC_S))
@@ -14791,8 +14795,7 @@ typedef struct
1479114795
((INSTANCE) == TIM17_NS))
1479214796

1479314797
/****************** TIM Instances : supporting 32 bits counter ****************/
14794-
#define IS_TIM_32B_COUNTER_INSTANCE(INSTANCE) (((INSTANCE) == TIM2_NS) || \
14795-
((INSTANCE) == TIM3_NS))
14798+
#define IS_TIM_32B_COUNTER_INSTANCE(INSTANCE) ((INSTANCE) == TIM2_NS)
1479614799

1479714800
/****************** TIM Instances : supporting the break function *************/
1479814801
#define IS_TIM_BREAK_INSTANCE(INSTANCE) (((INSTANCE) == TIM1_NS) || \
@@ -14974,9 +14977,16 @@ typedef struct
1497414977
((INSTANCE) == TIM3_NS))
1497514978

1497614979
/****************** TIM Instances : supporting OCxREF clear *******************/
14977-
#define IS_TIM_OCXREF_CLEAR_INSTANCE(INSTANCE) (((INSTANCE) == TIM1_NS) || \
14978-
((INSTANCE) == TIM2_NS) || \
14979-
((INSTANCE) == TIM3_NS))
14980+
#define IS_TIM_OCXREF_CLEAR_INSTANCE(INSTANCE) (((INSTANCE) == TIM1_NS) || \
14981+
((INSTANCE) == TIM2_NS) || \
14982+
((INSTANCE) == TIM3_NS) || \
14983+
((INSTANCE) == TIM16_NS) || \
14984+
((INSTANCE) == TIM17_NS))
14985+
14986+
/****************** TIM Instances : supporting bitfield OCCS in SMCR register *******************/
14987+
#define IS_TIM_OCCS_INSTANCE(INSTANCE) (((INSTANCE) == TIM1_NS) || \
14988+
((INSTANCE) == TIM2_NS) || \
14989+
((INSTANCE) == TIM3_NS))
1498014990

1498114991
/****************** TIM Instances : remapping capability **********************/
1498214992
#define IS_TIM_REMAP_INSTANCE(INSTANCE) (((INSTANCE) == TIM1_NS) || \
@@ -15010,9 +15020,9 @@ typedef struct
1501015020
#define IS_TIM_ADVANCED_INSTANCE(INSTANCE) ((INSTANCE) == TIM1_NS)
1501115021

1501215022
/****************** TIM Instances : supporting synchronization ****************/
15013-
#define IS_TIM_SYNCHRO_INSTANCE(__INSTANCE__) (((__INSTANCE__) == TIM1_NS) || \
15014-
((__INSTANCE__) == TIM2_NS) || \
15015-
((__INSTANCE__) == TIM3_NS))
15023+
#define IS_TIM_SYNCHRO_INSTANCE(INSTANCE) (((INSTANCE) == TIM1_NS) || \
15024+
((INSTANCE) == TIM2_NS) || \
15025+
((INSTANCE) == TIM3_NS))
1501615026

1501715027
/****************************** TSC Instances *********************************/
1501815028
#define IS_TSC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == TSC_NS)

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