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committedMay 15, 2025·
variant(u5): add Nucleo-U5A5ZJ-Q
Signed-off-by: patricklaf <patrick.lafarguette@gmail.com> Co-authored-by: Frederic Pillon <frederic.pillon@st.com>
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‎README.md

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@@ -121,6 +121,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| :green_heart: | STM32L4R5ZI-P | [Nucleo L4R5ZI-P](http://www.st.com/en/evaluation-tools/nucleo-l4r5zi-p.html) | *1.4.0* | |
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| :green_heart: | STM32L552ZE-Q | [Nucleo L552ZE-Q](https://www.st.com/en/evaluation-tools/nucleo-l552ze-q.html) | *2.0.0* | |
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| :green_heart: | STM32U575ZI-Q | [NUCLEO-U575ZI-Q](https://www.st.com/en/evaluation-tools/nucleo-u575zi-q.html) | *2.1.0* | |
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| :yellow_heart: | STM32U5A5ZJ-Q | [NUCLEO-U5A5ZJ-Q](https://www.st.com/en/evaluation-tools/nucleo-u5a5zj-q.html) | **2.11.0** | |
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### [Nucleo 64](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-nucleo-boards.html) boards
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‎boards.txt

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@@ -380,6 +380,22 @@ Nucleo_144.menu.pnum.NUCLEO_U575ZI_Q.build.peripheral_pins=-DCUSTOM_PERIPHERAL_P
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Nucleo_144.menu.pnum.NUCLEO_U575ZI_Q.openocd.target=stm32u5x
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Nucleo_144.menu.pnum.NUCLEO_U575ZI_Q.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U5xx/STM32U575.svd
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# NUCLEO_U5A5ZJ_Q board
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Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q=Nucleo U5A5ZJ-Q
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Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.node=NOD_U5A5ZJ
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Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.upload.maximum_size=4194304
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Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.upload.maximum_data_size=2555904
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Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.build.mcu=cortex-m33
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Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.build.fpu=-mfpu=fpv4-sp-d16
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Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.build.float-abi=-mfloat-abi=hard
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Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.build.board=NUCLEO_U5A5ZJ_Q
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Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.build.series=STM32U5xx
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Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.build.product_line=STM32U5A5xx
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Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.build.variant=STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ
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Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
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Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.openocd.target=stm32u5x
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Nucleo_144.menu.pnum.NUCLEO_U5A5ZJ_Q.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U5xx/STM32U5A5.svd
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# Upload menu
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Nucleo_144.menu.upload_method.MassStorage=Mass Storage
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Nucleo_144.menu.upload_method.MassStorage.upload.protocol=

‎cmake/boards_db.cmake

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‎variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/CMakeLists.txt

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@@ -23,6 +23,7 @@ add_library(variant_bin STATIC EXCLUDE_FROM_ALL
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PeripheralPins.c
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PeripheralPins_NUCLEO_U5A5ZJ_Q.c
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variant_generic.cpp
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variant_NUCLEO_U5A5ZJ_Q.cpp
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)
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target_link_libraries(variant_bin PUBLIC variant_usage)
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‎variants/STM32U5xx/U595Z(I-J)TxQ_U599Z(I-J)TxQ_U5A5ZJTxQ_U5A9ZJTxQ/PeripheralPins_NUCLEO_U5A5ZJ_Q.c

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/*
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*******************************************************************************
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* Copyright (c) 2021, STMicroelectronics
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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*/
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#if defined(ARDUINO_NUCLEO_U5A5ZJ_Q)
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#include "pins_arduino.h"
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// Digital PinName array
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const PinName digitalPin[] = {
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PG_8, // D0
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PG_7, // D1
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PF_15, // D2/A9
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PE_13, // D3
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PF_14, // D4/A10
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PE_11, // D5
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PE_9, // D6
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PF_13, // D7
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PF_12, // D8
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PD_15, // D9
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PD_14, // D10
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PA_7, // D11/A11
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PA_6, // D12/A12
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PA_5, // D13/A13
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PB_9, // D14
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PB_8, // D15
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PC_6, // D16
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PD_11, // D17/A14
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PB_13, // D18
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PD_12, // D19/A15
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PA_4, // D20/A16
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PB_4, // D21
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PB_5, // D22
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PB_3, // D23
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PA_4, // D24
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PB_4, // D25
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PA_2, // D26
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PB_10, // D27
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PE_15, // D28
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PB_0, // D29
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PE_12, // D30
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PE_14, // D31
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PA_0, // D32/A17
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PA_8, // D33
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PE_0, // D34
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PB_11, // D35
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PB_10, // D36
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PE_15, // D37
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PE_14, // D38
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PE_12, // D39
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PE_10, // D40
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PE_7, // D41
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PE_8, // D42
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PC_8, // D43
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PC_9, // D44
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PC_10, // D45
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PC_11, // D46
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PC_12, // D47
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PD_2, // D48
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PF_3, // D49
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PF_5, // D50
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PD_7, // D51
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PD_6, // D52
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PD_5, // D53
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PD_4, // D54
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PD_3, // D55
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PE_2, // D56
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PE_4, // D57
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PE_5, // D58
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PE_6, // D59
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PE_3, // D60
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PF_8, // D61
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PF_7, // D62
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PF_9, // D63
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PG_1, // D64/A18
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PG_0, // D65/A19
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PD_1, // D66
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PD_0, // D67
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PF_0, // D68
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PF_1, // D69
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PF_2, // D70
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PB_6, // D71
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PB_2, // D72/A20
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PA_3, // D73/A0
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PA_2, // D74/A1
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PC_3, // D75/A2
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PB_0, // D76/A3
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PC_1, // D77/A4
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PC_0, // D78/A5
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PB_1, // D79/A6
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PC_2, // D80/A7
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PA_1, // D81/A8
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PA_9, // D82
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PA_10, // D83
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PA_11, // D84
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PA_12, // D85
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PA_13, // D86
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PA_14, // D87
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PA_15, // D88
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PB_7, // D89
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PB_14, // D90
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PB_15, // D91
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PC_7, // D92
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PC_13, // D93
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PC_14, // D94
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PC_15, // D95
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PD_8, // D96
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PD_9, // D97
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PD_10, // D98
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PD_13, // D99/A21
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PE_1, // D100
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PF_4, // D101
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PF_6, // D102
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PF_10, // D103
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PF_11, // D104
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PG_2, // D105
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PG_3, // D106
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PG_4, // D107
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PG_5, // D108
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PG_6, // D109
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PG_9, // D110
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PG_10, // D111
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PG_12, // D112
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PG_13, // D113
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PG_14, // D114
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PG_15, // D115
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PH_0, // D116
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PH_1, // D117
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PH_3 // D118
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};
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// Analog (Ax) pin number array
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const uint32_t analogInputPin[] = {
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73, // A0, PA3
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74, // A1, PA2
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75, // A2, PC3
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76, // A3, PB0
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77, // A4, PC1
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78, // A5, PC0
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79, // A6, PB1
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80, // A7, PC2
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81, // A8, PA1
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2, // A9, PF15
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4, // A10, PF14
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11, // A11, PA7
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12, // A12, PA6
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13, // A13, PA5
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17, // A14, PD11
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19, // A15, PD12
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20, // A16, PA4
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32, // A17, PA0
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64, // A18, PG1
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65, // A19, PG0
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72, // A20, PB2
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99 // A21, PD13
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};
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// ----------------------------------------------------------------------------
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** System Clock Configuration
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*/
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WEAK void SystemClock_Config(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
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RCC_CRSInitTypeDef RCC_CRSInitStruct = {};
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RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
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/*
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* Switch to SMPS regulator instead of LDO
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*/
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if (HAL_PWREx_ConfigSupply(PWR_SMPS_SUPPLY) != HAL_OK) {
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Error_Handler();
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}
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/** Configure the main internal regulator output voltage
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*/
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if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) {
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Error_Handler();
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}
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/** Configure LSE Drive Capability
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*/
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HAL_PWR_EnableBkUpAccess();
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__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI
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| RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.LSEState = RCC_LSE_ON;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
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RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLMBOOST = RCC_PLLMBOOST_DIV1;
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RCC_OscInitStruct.PLL.PLLM = 1;
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RCC_OscInitStruct.PLL.PLLN = 20;
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RCC_OscInitStruct.PLL.PLLP = 8;
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RCC_OscInitStruct.PLL.PLLQ = 2;
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RCC_OscInitStruct.PLL.PLLR = 2;
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RCC_OscInitStruct.PLL.PLLRGE = RCC_PLLVCIRANGE_1;
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RCC_OscInitStruct.PLL.PLLFRACN = 0;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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Error_Handler();
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}
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
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| RCC_CLOCKTYPE_PCLK3;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
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Error_Handler();
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}
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/** Enable the SYSCFG APB clock
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*/
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__HAL_RCC_CRS_CLK_ENABLE();
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/** Configures CRS
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*/
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RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
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RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_LSE;
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RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
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RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 32768);
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RCC_CRSInitStruct.ErrorLimitValue = 34;
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RCC_CRSInitStruct.HSI48CalibrationValue = 32;
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HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_ADCDAC
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| RCC_PERIPHCLK_DAC1 | RCC_PERIPHCLK_LPUART1
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| RCC_PERIPHCLK_SDMMC | RCC_PERIPHCLK_CLK48
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| RCC_PERIPHCLK_USBPHY;
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PeriphClkInit.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_SYSCLK;
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PeriphClkInit.Dac1ClockSelection = RCC_DAC1CLKSOURCE_LSE;
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PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI;
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PeriphClkInit.IclkClockSelection = RCC_CLK48CLKSOURCE_HSI48;
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PeriphClkInit.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_CLK48;
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PeriphClkInit.UsbPhyClockSelection = RCC_USBPHYCLKSOURCE_HSE;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
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Error_Handler();
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}
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* ARDUINO_NUCLEO_U5A5ZJ_Q */
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/*
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*******************************************************************************
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* Copyright (c) 2021, STMicroelectronics
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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*/
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#pragma once
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/*----------------------------------------------------------------------------
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* STM32 pins number
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*----------------------------------------------------------------------------*/
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#define PG8 0
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#define PG7 1
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#define PF15 PIN_A9
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#define PE13 3
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#define PF14 PIN_A10
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#define PE11 5
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#define PE9 6
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#define PF13 7
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#define PF12 8
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#define PD15 9
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#define PD14 10
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#define PA7 PIN_A11
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#define PA6 PIN_A12
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#define PA5 PIN_A13
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#define PB9 14
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#define PB8 15
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#define PC6 16
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#define PD11 PIN_A14
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#define PB13 18
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#define PD12 PIN_A15
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#define PA4 PIN_A16 // SB35 ON
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#define PB4 21 // SB36 ON
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#define PB5 22 // UCPD TCPP
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#define PB3 23
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// 24 is PA4 (20) as default SB38 ON
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// 25 is PB4 (21) as default SB43 ON
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// 26 is PA2 (A1) as default SB57 ON
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#define PB10 27 // SB61 ON
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#define PE15 28 // SB66 ON
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// 29 is PB0 (A3) as default SB63 ON
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#define PE12 30 // SB68 ON
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#define PE14 31 // SB70 ON
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#define PA0 PIN_A17
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#define PA8 33
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#define PE0 34
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#define PB11 35
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// 36 is PB10 (27) as default SB62 ON
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// 37 is PE15 (28) as default SB67 ON
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// 38 is PE14 (31) as default SB71 ON
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// 39 is PE12 (30) as default SB69 ON
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#define PE10 40
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#define PE7 41
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#define PE8 42
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#define PC8 43
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#define PC9 44
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#define PC10 45
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#define PC11 46
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#define PC12 47
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#define PD2 48
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#define PF3 49
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#define PF5 50
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#define PD7 51
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#define PD6 52
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#define PD5 53
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#define PD4 54
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#define PD3 55
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#define PE2 56
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#define PE4 57
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#define PE5 58
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#define PE6 59
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#define PE3 60
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#define PF8 61
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#define PF7 62
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#define PF9 63
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#define PG1 PIN_A18
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#define PG0 PIN_A19
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#define PD1 66
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#define PD0 67
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#define PF0 68
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#define PF1 69
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#define PF2 70
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#define PB6 71
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#define PB2 PIN_A20
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#define PA3 PIN_A0
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#define PA2 PIN_A1 // SB57 ON
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#define PC3 PIN_A2
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#define PB0 PIN_A3 // SB64 ON
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#define PC1 PIN_A4
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#define PC0 PIN_A5
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#define PB1 PIN_A6
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#define PC2 PIN_A7
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#define PA1 PIN_A8
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#define PA9 82
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#define PA10 83
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#define PA11 84
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#define PA12 85
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#define PA13 86
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#define PA14 87
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#define PA15 88
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#define PB7 89
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#define PB14 90
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#define PB15 91
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#define PC7 92
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#define PC13 93
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#define PC14 94
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#define PC15 95
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#define PD8 96
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#define PD9 97
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#define PD10 98
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#define PD13 PIN_A21
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#define PE1 100
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#define PF4 101
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#define PF6 102
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#define PF10 103
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#define PF11 104
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#define PG2 105
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#define PG3 106
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#define PG4 107
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#define PG5 108
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#define PG6 109
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#define PG9 110
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#define PG10 111
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#define PG12 112
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#define PG13 113
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#define PG14 114
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#define PG15 115
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#define PH0 116
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#define PH1 117
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#define PH3 118 // BOOT0
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// Alternate pins number
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#define PA0_ALT1 (PA0 | ALT1)
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#define PA1_ALT1 (PA1 | ALT1)
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#define PA1_ALT2 (PA1 | ALT2)
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#define PA2_ALT1 (PA2 | ALT1)
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#define PA2_ALT2 (PA2 | ALT2)
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#define PA3_ALT1 (PA3 | ALT1)
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#define PA3_ALT2 (PA3 | ALT2)
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#define PA4_ALT1 (PA4 | ALT1)
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#define PA5_ALT1 (PA5 | ALT1)
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#define PA6_ALT1 (PA6 | ALT1)
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#define PA7_ALT1 (PA7 | ALT1)
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#define PA7_ALT2 (PA7 | ALT2)
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#define PA7_ALT3 (PA7 | ALT3)
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#define PA15_ALT1 (PA15 | ALT1)
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#define PB0_ALT1 (PB0 | ALT1)
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#define PB0_ALT2 (PB0 | ALT2)
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#define PB1_ALT1 (PB1 | ALT1)
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#define PB1_ALT2 (PB1 | ALT2)
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#define PB3_ALT1 (PB3 | ALT1)
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#define PB4_ALT1 (PB4 | ALT1)
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#define PB5_ALT1 (PB5 | ALT1)
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#define PB6_ALT1 (PB6 | ALT1)
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#define PB7_ALT1 (PB7 | ALT1)
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#define PB8_ALT1 (PB8 | ALT1)
164+
#define PB8_ALT2 (PB8 | ALT2)
165+
#define PB9_ALT1 (PB9 | ALT1)
166+
#define PB9_ALT2 (PB9 | ALT2)
167+
#define PB10_ALT1 (PB10 | ALT1)
168+
#define PB11_ALT1 (PB11 | ALT1)
169+
#define PB13_ALT1 (PB13 | ALT1)
170+
#define PB14_ALT1 (PB14 | ALT1)
171+
#define PB14_ALT2 (PB14 | ALT2)
172+
#define PB15_ALT1 (PB15 | ALT1)
173+
#define PB15_ALT2 (PB15 | ALT2)
174+
#define PC0_ALT1 (PC0 | ALT1)
175+
#define PC1_ALT1 (PC1 | ALT1)
176+
#define PC2_ALT1 (PC2 | ALT1)
177+
#define PC3_ALT1 (PC3 | ALT1)
178+
#define PC6_ALT1 (PC6 | ALT1)
179+
#define PC6_ALT2 (PC6 | ALT2)
180+
#define PC7_ALT1 (PC7 | ALT1)
181+
#define PC7_ALT2 (PC7 | ALT2)
182+
#define PC8_ALT1 (PC8 | ALT1)
183+
#define PC9_ALT1 (PC9 | ALT1)
184+
#define PC10_ALT1 (PC10 | ALT1)
185+
#define PC11_ALT1 (PC11 | ALT1)
186+
#define PF9_ALT1 (PF9 | ALT1)
187+
188+
#define NUM_DIGITAL_PINS 119
189+
#define NUM_ANALOG_INPUTS 22
190+
191+
// On-board LED pin number
192+
#ifndef LED_LD1
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// SB21 ON/SB23 OFF (default) else PA5 with SB21 OFF/SB23 ON
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#define LED_LD1 PC7
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#endif
196+
#define LED_LD2 PB7
197+
#define LED_LD3 PG2
198+
199+
#define LED_GREEN LED_LD1
200+
#define LED_BLUE LED_LD2
201+
#define LED_RED LED_LD3
202+
203+
#ifndef LED_BUILTIN
204+
#define LED_BUILTIN LED_GREEN
205+
#endif
206+
207+
// On-board user button
208+
#ifndef B1_USER
209+
// SB58 ON/SB59 OFF (default) else PA0 with SB58 OFF/SB59 ON
210+
#define B1_USER PC13
211+
#endif
212+
#ifndef USER_BTN
213+
#define USER_BTN B1_USER
214+
#endif
215+
216+
// Timer Definitions
217+
// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
218+
#ifndef TIMER_TONE
219+
#define TIMER_TONE TIM6
220+
#endif
221+
#ifndef TIMER_SERVO
222+
#define TIMER_SERVO TIM7
223+
#endif
224+
225+
// UART Definitions
226+
#ifndef SERIAL_UART_INSTANCE
227+
#define SERIAL_UART_INSTANCE 1
228+
#endif
229+
230+
// Default pin used for generic 'Serial' instance
231+
// Mandatory for Firmata
232+
#ifndef PIN_SERIAL_RX
233+
#define PIN_SERIAL_RX PA10
234+
#endif
235+
#ifndef PIN_SERIAL_TX
236+
#define PIN_SERIAL_TX PA9
237+
#endif
238+
239+
// Pin UCPD to configure TCPP in default Type-C legacy state (UCPD_DBn for TCPP01)
240+
#define PIN_UCPD_TCPP PB5
241+
242+
// Extra HAL modules
243+
#if !defined(HAL_DAC_MODULE_DISABLED)
244+
#define HAL_DAC_MODULE_ENABLED
245+
#endif
246+
#if !defined(HAL_OSPI_MODULE_DISABLED)
247+
#define HAL_OSPI_MODULE_ENABLED
248+
#endif
249+
#if !defined(HAL_SD_MODULE_DISABLED)
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#define HAL_SD_MODULE_ENABLED
251+
#endif
252+
253+
// Alternate SYS_WKUP definition
254+
#define PWR_WAKEUP_PIN1_1
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#define PWR_WAKEUP_PIN1_2
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#define PWR_WAKEUP_PIN2_1
257+
#define PWR_WAKEUP_PIN2_2
258+
#define PWR_WAKEUP_PIN3_1
259+
#define PWR_WAKEUP_PIN3_2
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#define PWR_WAKEUP_PIN4_1
261+
#define PWR_WAKEUP_PIN4_2
262+
#define PWR_WAKEUP_PIN5_1
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#define PWR_WAKEUP_PIN6_1
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#define PWR_WAKEUP_PIN6_2
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#define PWR_WAKEUP_PIN7_1
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#define PWR_WAKEUP_PIN7_2
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#define PWR_WAKEUP_PIN8_1
268+
#define PWR_WAKEUP_PIN8_2
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270+
/*----------------------------------------------------------------------------
271+
* Arduino objects - C++ only
272+
*----------------------------------------------------------------------------*/
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#ifdef __cplusplus
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// These serial port names are intended to allow libraries and architecture-neutral
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// sketches to automatically default to the correct port name for a particular type
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// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
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// the first hardware serial port whose RX/TX pins are not dedicated to another use.
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//
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// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
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//
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// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
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//
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// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
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//
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// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
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//
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// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
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// pins are NOT connected to anything by default.
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#ifndef SERIAL_PORT_MONITOR
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#define SERIAL_PORT_MONITOR Serial
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#endif
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#ifndef SERIAL_PORT_HARDWARE
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#define SERIAL_PORT_HARDWARE Serial
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#endif
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#endif

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