Skip to content

Commit 0cc1d20

Browse files
committed
Add macro for defining CAN pins.
1 parent 70544ea commit 0cc1d20

File tree

1 file changed

+33
-11
lines changed

1 file changed

+33
-11
lines changed

src/can.rs

Lines changed: 33 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1,27 +1,49 @@
11
use super::pac;
22
use super::pac::can::TX;
3+
use crate::gpio::gpioa::{PA11, PA12};
34
use crate::gpio::gpiob::{PB8, PB9};
45
use crate::gpio::{Alternate, AF4};
56
use crate::rcc::Rcc;
67

7-
pub struct CANBus {
8+
pub trait RxPin {}
9+
pub trait TxPin {}
10+
11+
macro_rules! can_pins {
12+
(
13+
rx => [$($rx:ty),+ $(,)*],
14+
tx => [$($tx:ty),+ $(,)*],
15+
) => {
16+
$(
17+
impl RxPin for $rx {}
18+
)+
19+
$(
20+
impl TxPin for $tx {}
21+
)+
22+
};
23+
}
24+
25+
#[cfg(any(feature = "stm32f042", feature = "stm32f072", feature = "stm32f091"))]
26+
can_pins! {
27+
rx => [PA11<Alternate<AF4>>, PB8<Alternate<AF4>>],
28+
tx => [PA12<Alternate<AF4>>, PB9<Alternate<AF4>>],
29+
}
30+
31+
pub struct CANBus<RX_PIN, TX_PIN> {
832
can: pac::CAN,
9-
_rx: PB8<Alternate<AF4>>,
10-
_tx: PB9<Alternate<AF4>>,
33+
_rx: RX_PIN,
34+
_tx: TX_PIN,
1135
}
1236

1337
pub enum Event {
1438
RxMessagePending,
1539
}
1640

17-
impl CANBus {
18-
// TODO add setting of pins the same way as done in other peripherals
19-
pub fn new(
20-
can: pac::CAN,
21-
rx: PB8<Alternate<AF4>>,
22-
tx: PB9<Alternate<AF4>>,
23-
rcc: &mut Rcc,
24-
) -> Self {
41+
impl<RX_PIN, TX_PIN> CANBus<RX_PIN, TX_PIN>
42+
where
43+
RX_PIN: RxPin,
44+
TX_PIN: TxPin,
45+
{
46+
pub fn new(can: pac::CAN, rx: RX_PIN, tx: TX_PIN, rcc: &mut Rcc) -> Self {
2547
rcc.regs.apb1enr.modify(|_, w| w.canen().enabled());
2648
rcc.regs.apb1rstr.modify(|_, w| w.canrst().reset());
2749
rcc.regs.apb1rstr.modify(|_, w| w.canrst().clear_bit());

0 commit comments

Comments
 (0)