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made registers code build
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9 files changed

+27
-16
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mdbook/src/07-registers/Cargo.toml

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@@ -7,3 +7,14 @@ authors = [
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edition = "2021"
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name = "registers"
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version = "0.2.0"
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[dependencies]
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cortex-m = "0.7.7"
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cortex-m-rt = "0.7.3"
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microbit-v2 = "0.15.0"
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panic-rtt-target = "0.1.3"
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rtt-target = "0.5.0"
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[dependencies.nrf52833-hal]
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version = "0.18.0"
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features = ["rt"]

mdbook/src/07-registers/bad-address.md

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@@ -45,7 +45,7 @@ handler*, which is just a function/subroutine.
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There are different kind of exceptions. Each kind of exception is raised by different conditions and
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each one is handled by a different exception handler.
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The `aux7` crate depends on the `cortex-m-rt` crate which defines a default
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The `registers` crate depends on the `cortex-m-rt` crate which defines a default
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*hard fault* handler, named `HardFault_`, that handles the "invalid memory
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address" exception. `embed.gdb` placed a breakpoint on `HardFault`; that's why
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the debugger halted your program while it was executing the exception handler.

mdbook/src/07-registers/optimization.md

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@@ -34,7 +34,7 @@ $ cat debug.dump
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160: push {r7, lr}
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162: mov r7, sp
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164: sub sp, #0x8
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166: bl 0x198 <aux7::init::hb6346637538e8ec5> @ imm = #0x2e
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166: bl 0x198 <registers::init::hb6346637538e8ec5> @ imm = #0x2e
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16a: movw r1, #0x504 ; <-- Load lower half of `OUT` register address into register `r1`
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16e: movt r1, #0x5000 ; <-- Load upper half of `OUT` register address into register `r1`
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172: str r1, [sp, #0x4]
@@ -69,7 +69,7 @@ $ cat release.dump
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00000160 <registers::__cortex_m_rt_main::h1f38525e07b97485>:
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160: push {r7, lr}
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162: mov r7, sp
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164: bl 0x17a <aux7::init::h4390f1d4f8a071f7> @ imm = #0x12
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164: bl 0x17a <registers::init::h4390f1d4f8a071f7> @ imm = #0x12
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168: movw r0, #0x504 ; <-- Load lower half of `OUT` register address into register `r0`
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16c: movt r0, #0x5000 ; <-- Load upper half of `OUT` register address into register `r0`
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170: ldr r1, [r0] ; <-- (?) Load value at the address in `r0` into `r1`.
@@ -110,7 +110,7 @@ $ cat release.volatile.dump
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00000160 <registers::__cortex_m_rt_main::h1f38525e07b97485>:
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160: push {r7, lr}
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162: mov r7, sp
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164: bl 0x192 <aux7::init::h4390f1d4f8a071f7> @ imm = #0x2a
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164: bl 0x192 <registers::init::h4390f1d4f8a071f7> @ imm = #0x2a
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168: movw r0, #0x504
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16c: movt r0, #0x5000
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170: ldr r1, [r0]

mdbook/src/07-registers/src/bin/bad.rs

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@@ -4,11 +4,11 @@
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use core::ptr;
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#[allow(unused_imports)]
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use aux7::entry;
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use registers::entry;
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#[entry]
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fn main() -> ! {
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aux7::init();
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registers::init();
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unsafe {
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ptr::read_volatile(0x5000_A784 as *const u32);

mdbook/src/07-registers/src/bin/spooky.rs

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@@ -4,7 +4,7 @@
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use core::ptr;
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#[allow(unused_imports)]
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use aux7::{entry, rprintln};
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use registers::{entry, rprintln};
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// Print the current contents of P0.OUT
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fn print_out() {
@@ -17,7 +17,7 @@ fn print_out() {
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#[entry]
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fn main() -> ! {
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aux7::init();
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registers::init();
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unsafe {
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// A bunch of magic addresses!

mdbook/src/07-registers/src/bin/type-safe.rs

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@@ -2,11 +2,11 @@
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#![no_std]
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#[allow(unused_imports)]
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use aux7::entry;
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use registers::entry;
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#[entry]
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fn main() -> ! {
9-
let (p0, _p1) = aux7::init();
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let (p0, _p1) = registers::init();
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// Turn on the top row
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p0.out.modify(|_, w| w.pin21().set_bit());

mdbook/src/07-registers/src/bin/volatile.rs

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@@ -4,11 +4,11 @@
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use core::ptr;
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#[allow(unused_imports)]
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use aux7::entry;
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use registers::entry;
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#[entry]
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fn main() -> ! {
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aux7::init();
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registers::init();
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unsafe {
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// A magic address!

mdbook/src/07-registers/src/main.rs

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@@ -2,11 +2,11 @@
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#![no_std]
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#[allow(unused_imports)]
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use aux7::entry;
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use registers::entry;
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#[entry]
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fn main() -> ! {
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aux7::init();
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registers::init();
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unsafe {
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// A magic address!

mdbook/src/07-registers/type-safe-manipulation.md

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@@ -17,7 +17,7 @@ Wouldn't it be nice if we had an API to manipulate registers in a "safe" manner?
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should encode these three points I've mentioned: No messing around with the actual addresses, should
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respect read/write permissions and should prevent modification of the reserved parts of a register.
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Well, we do! `aux7::init()` actually returns a value that provides a type safe API to manipulate the
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Well, we do! `registers::init()` actually returns a value that provides a type safe API to manipulate the
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registers of the `P0` and `P1` ports.
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As you may remember: a group of registers associated to a peripheral is called register block, and
@@ -340,7 +340,7 @@ Then search for `main` in `release.type-safe.dump`
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00000160 <registers::__cortex_m_rt_main::h0e9b57c6799332fd>:
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160: push {r7, lr}
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162: mov r7, sp
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164: bl 0x192 <aux7::init::hec71dddc40be11b5> @ imm = #0x2a
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164: bl 0x192 <registers::init::hec71dddc40be11b5> @ imm = #0x2a
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168: movw r0, #0x504
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16c: movt r0, #0x5000
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170: ldr r1, [r0]

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