PCM1808 with ESP32-S3: Zeros in I2S Samples Despite Valid Input

[dtrueb]

Hello Phil and loyal followers:

I am an older hobbiest with poor hearing and I’m trying to build a device to stream analog audio from RCA inputs to Oticon Intent hearing aids via Bluetooth LE, using an ESP32-S3-DevKitC-1 and PCM1808 ADC breakout (from Amazon, tested multiple units). I'm also a loyal Linux enthusiast and find it frustrating that most of the HA manufacturers are not supporting BTLE directly on Linux and are pretty slow in facing up to that need and continue to fall back upon ASHA under Android.

As for my project, I’m getting 4 bytes read per I2S sample but all zeros, despite a 1.27V RMS input (800 Hz sine from sox play -n synth 20 sine 800 vol 0dB). The wiki (https://github.com/pschatzmann/arduino-audio-tools/wiki/It's-not-working) and Discussion #162 suggest format or clock issues, but I’ve aligned with the PCM1808 datasheet (https://www.ti.com/lit/ds/symlink/pcm1808.pdf). As you recommend, I have reviewed all of the other Discussions containing the "PCM1808" and found nothing that changed my results. I have bought more devices, but they all perform the same. Any insights?

Setup:

Hardware: ESP32-S3-DevKitC-1 (Arduino core 3.0.2, IDE 1.8.19, Linux Mint 22.1), PCM1808 breakout (matches Figure 26, page 19).
Wiring:
PCM1808 FMT/MD0/MD1/GND -> GND or FMT -> 3.3V (10 kΩ pull-down/up per par 8.2.2.1).
PCM1808 +5V -> ESP32-S3 5V0 (yellow, 0.1µF+10µF caps).
PCM1808 3.3 -> ESP32-S3 3V3 (red, 0.1µF+10µF caps).
PCM1808 BCK -> GPIO16 (orange), OUT -> GPIO12 (black), LRC -> GPIO15 (green), SCK -> GPIO17 (grey, MCLK).
PCM1808 LIN/RIN -> RCA left/right (yellow/black, 1.27V AC, 800 Hz), GNDIN -> RCA ground (white).

Code: Using Arduino Audio Tools (1.1.2), mono, 24-bit, 48kHz, left-justified or I²S:

####################################################################
#include <AudioTools.h>

#define I2S_WS 15
#define I2S_SCK 16
#define I2S_SD 12
#define I2S_MCK 17
#define SAMPLE_RATE 48000
#define CHANNELS 1

I2SStream i2s;

void setup() {
Serial.begin(115200);
delay(1000);
Serial.println("Starting I2S ADC Capture");
AudioToolsLogger.begin(Serial, AudioToolsLogLevel::Warning);
auto cfg = i2s.defaultConfig(RX_MODE);
cfg.sample_rate = SAMPLE_RATE;
cfg.bits_per_sample = 24;
cfg.channels = CHANNELS;
cfg.i2s_format = I2S_LEFT_JUSTIFIED_FORMAT; // or I2S_STD_FORMAT
cfg.pin_ws = I2S_WS;
cfg.pin_bck = I2S_SCK;
cfg.pin_data = I2S_SD;
cfg.is_master = true;
cfg.use_apll = true;
i2s.begin(cfg);
}

void loop() {
Serial.println("Loop running");
int32_t sample;
size_t read = i2s.readBytes((uint8_t*)&sample, sizeof(sample));
Serial.print("Bytes read: ");
Serial.println(read);
if (read > 0) {
Serial.print("Sample: ");
Serial.println(sample);
} else {
Serial.println("No data read");
}
delay(100);
}
####################################################################

Serial Output (during tone):Starting I2S ADC Capture
I2S started successfully
Loop running
Bytes read: 4
Sample: 0
Loop running
Bytes read: 4
Sample: 0
...

Measurements:
LIN/RIN: 1.27V AC, ~800 Hz.
LRC (GPIO15): 48 kHz (verified earlier at 16 kHz for 16kHz rate).
MCK (GPIO17), BCK (GPIO16), SD (GPIO12): Toggle ~1.4V AC (multimeter limit ~450 Hz).
Loopback (I2S TX) worked, outputting ~1V on SD.

Tried:
FMT = HIGH (3.3V, left-justified) and GND (I²S, per Table 3, page 16).
10 kΩ pull-down/up on FMT/MD0/MD1 (par 8.2.2.1).
ESP master/slave, 48kHz/96kHz, 24-bit/32-bit, APLL = true.
Swapped multiple PCM1808s, verified wiring (Figure 26).
Discussion #162 suggests MCLK on GPIO0, but S3 supports GPIO17.

Questions:

Could PCM1808 breakouts (Amazon) have undocumented quirks causing zeros despite correct format/clocks?
Is MCLK (GPIO17, ~18.432 MHz for 48kHz, 384x f_S per par 7.3.5.1.2) misaligned? Should I try GPIO0?
Could data alignment (24-bit in 32-bit words) cause zeros? Any bit-shifting needed in Audio Tools?
Any known PCM1808 issues with Audio Tools leading to zeros?

I like the PCM1808 breakout board, a good price, nice small size and seems to be exactly like the Application example in the TI datasheet. Too bad it is so finicky!

Thanks for the fantastic library! I’m an EE hobbyist with telecom experience, eager to resolve this.

Best regards, dtrueb

[pschatzmann]

My original answer still applies...

Just looking at your code:

• Your sketch is missing the pin definition for the masterclock
• Did you try with use_apll=false: I was usually getting issues with the apll on the input side