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Added webrev for jdk18/24
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jdk18/24/03/commits.json

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[{"commit":{"message":"8278508: Review comments addressed."},"files":[{"filename":"src\/hotspot\/cpu\/x86\/c2_MacroAssembler_x86.cpp"},{"filename":"src\/hotspot\/cpu\/x86\/x86.ad"},{"filename":"src\/hotspot\/cpu\/x86\/x86_32.ad"},{"filename":"src\/hotspot\/cpu\/x86\/x86_64.ad"}],"sha":"583062da8d784f295a5047d55ec0d57fc028a633"},{"commit":{"message":"8278508: Review comments resolved."},"files":[{"filename":"src\/hotspot\/cpu\/x86\/assembler_x86.cpp"},{"filename":"src\/hotspot\/cpu\/x86\/assembler_x86.hpp"},{"filename":"src\/hotspot\/cpu\/x86\/c2_MacroAssembler_x86.cpp"},{"filename":"src\/hotspot\/cpu\/x86\/x86.ad"},{"filename":"src\/hotspot\/cpu\/x86\/x86_32.ad"},{"filename":"src\/hotspot\/cpu\/x86\/x86_64.ad"}],"sha":"611b943aa5847a55e453a1918cf4e8bef1a2de0b"},{"commit":{"message":"8278508: Review comments resolution."},"files":[{"filename":"test\/jdk\/jdk\/incubator\/vector\/Byte512VectorTests.java"},{"filename":"test\/jdk\/jdk\/incubator\/vector\/ByteMaxVectorTests.java"},{"filename":"test\/jdk\/jdk\/incubator\/vector\/VectorReshapeTests.java"}],"sha":"4fb1ea1b1209d383384953dfcab067064fc60e7f"},{"commit":{"message":"8278508: Enable X86 maskAll instruction pattern for 32 bit JVM."},"files":[{"filename":"src\/hotspot\/cpu\/x86\/assembler_x86.cpp"},{"filename":"src\/hotspot\/cpu\/x86\/assembler_x86.hpp"},{"filename":"src\/hotspot\/cpu\/x86\/c2_MacroAssembler_x86.cpp"},{"filename":"src\/hotspot\/cpu\/x86\/c2_MacroAssembler_x86.hpp"},{"filename":"src\/hotspot\/cpu\/x86\/x86.ad"},{"filename":"src\/hotspot\/cpu\/x86\/x86_32.ad"},{"filename":"src\/hotspot\/cpu\/x86\/x86_64.ad"}],"sha":"583e5e480737c96ec104eeb4ec32e7f52cf4e65e"}]

jdk18/24/03/comparison.json

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{"files":[{"patch":"@@ -2791,0 +2791,9 @@\n+void Assembler::kshiftlql(KRegister dst, KRegister src, int imm8) {\n+ assert(VM_Version::supports_avx512bw(), \"\");\n+ InstructionAttr attributes(AVX_128bit, \/* rex_w *\/ true, \/* legacy_mode *\/ true, \/* no_mask_reg *\/ true, \/* uses_vl *\/ false);\n+ int encode = vex_prefix_and_encode(dst->encoding(), 0 , src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_3A, &attributes);\n+ emit_int16(0x33, (0xC0 | encode));\n+ emit_int8(imm8);\n+}\n+\n+\n@@ -2822,0 +2831,7 @@\n+void Assembler::kunpckdql(KRegister dst, KRegister src1, KRegister src2) {\n+ assert(VM_Version::supports_avx512bw(), \"\");\n+ InstructionAttr attributes(AVX_256bit, \/* rex_w *\/ true, \/* legacy_mode *\/ true, \/* no_mask_reg *\/ true, \/* uses_vl *\/ false);\n+ int encode = vex_prefix_and_encode(dst->encoding(), src1->encoding(), src2->encoding(), VEX_SIMD_NONE, VEX_OPCODE_0F, &attributes);\n+ emit_int16(0x4B, (0xC0 | encode));\n+}\n+\n","filename":"src\/hotspot\/cpu\/x86\/assembler_x86.cpp","additions":16,"deletions":0,"binary":false,"changes":16,"status":"modified"},{"patch":"@@ -1513,0 +1513,1 @@\n+ void kshiftlql(KRegister dst, KRegister src, int imm8);\n@@ -1519,0 +1520,2 @@\n+ void kunpckdql(KRegister dst, KRegister src1, KRegister src2);\n+\n","filename":"src\/hotspot\/cpu\/x86\/assembler_x86.hpp","additions":3,"deletions":0,"binary":false,"changes":3,"status":"modified"},{"patch":"@@ -4276,0 +4276,27 @@\n+\n+void C2_MacroAssembler::vector_maskall_operation(KRegister dst, Register src, int mask_len) {\n+ if (VM_Version::supports_avx512bw()) {\n+ if (mask_len > 32) {\n+ kmovql(dst, src);\n+ } else {\n+ kmovdl(dst, src);\n+ if (mask_len != 32) {\n+ kshiftrdl(dst, dst, 32 - mask_len);\n+ }\n+ }\n+ } else {\n+ assert(mask_len <= 16, \"\");\n+ kmovwl(dst, src);\n+ if (mask_len != 16) {\n+ kshiftrwl(dst, dst, 16 - mask_len);\n+ }\n+ }\n+}\n+\n+#ifndef _LP64\n+void C2_MacroAssembler::vector_maskall_operation32(KRegister dst, Register src, KRegister tmp, int mask_len) {\n+ assert(VM_Version::supports_avx512bw(), \"\");\n+ kmovdl(tmp, src);\n+ kunpckdql(dst, tmp, tmp);\n+}\n+#endif\n","filename":"src\/hotspot\/cpu\/x86\/c2_MacroAssembler_x86.cpp","additions":27,"deletions":0,"binary":false,"changes":27,"status":"modified"},{"patch":"@@ -234,0 +234,7 @@\n+\n+ void vector_maskall_operation(KRegister dst, Register src, int mask_len);\n+\n+#ifndef _LP64\n+ void vector_maskall_operation32(KRegister dst, Register src, KRegister ktmp, int mask_len);\n+#endif\n+\n","filename":"src\/hotspot\/cpu\/x86\/c2_MacroAssembler_x86.hpp","additions":7,"deletions":0,"binary":false,"changes":7,"status":"modified"},{"patch":"@@ -1830,1 +1830,1 @@\n- if (!is_LP64 || !VM_Version::supports_evex()) {\n+ if (!VM_Version::supports_evex()) {\n@@ -9454,41 +9454,2 @@\n-#ifdef _LP64\n-instruct mask_all_evexI_imm(kReg dst, immI cnt, rRegL tmp) %{\n- match(Set dst (MaskAll cnt));\n- effect(TEMP_DEF dst, TEMP tmp);\n- format %{ \"mask_all_evexI $dst, $cnt \\t! using $tmp as TEMP\" %}\n- ins_encode %{\n- int vec_len = Matcher::vector_length(this);\n- if (VM_Version::supports_avx512bw()) {\n- __ movq($tmp$$Register, $cnt$$constant);\n- __ kmovql($dst$$KRegister, $tmp$$Register);\n- __ kshiftrql($dst$$KRegister, $dst$$KRegister, 64 - vec_len);\n- } else {\n- assert(vec_len <= 16, \"\");\n- __ movq($tmp$$Register, $cnt$$constant);\n- __ kmovwl($dst$$KRegister, $tmp$$Register);\n- __ kshiftrwl($dst$$KRegister, $dst$$KRegister, 16 - vec_len);\n- }\n- %}\n- ins_pipe( pipe_slow );\n-%}\n-\n-instruct mask_all_evexI(kReg dst, rRegI src, rRegL tmp) %{\n- match(Set dst (MaskAll src));\n- effect(TEMP_DEF dst, TEMP tmp);\n- format %{ \"mask_all_evexI $dst, $src \\t! using $tmp as TEMP\" %}\n- ins_encode %{\n- int vec_len = Matcher::vector_length(this);\n- if (VM_Version::supports_avx512bw()) {\n- __ movslq($tmp$$Register, $src$$Register);\n- __ kmovql($dst$$KRegister, $tmp$$Register);\n- __ kshiftrql($dst$$KRegister, $dst$$KRegister, 64 - vec_len);\n- } else {\n- assert(vec_len <= 16, \"\");\n- __ kmovwl($dst$$KRegister, $src$$Register);\n- __ kshiftrwl($dst$$KRegister, $dst$$KRegister, 16 - vec_len);\n- }\n- %}\n- ins_pipe( pipe_slow );\n-%}\n-\n-instruct mask_all_evexL(kReg dst, rRegL src) %{\n+instruct mask_all_evexI_LE32(kReg dst, rRegI src) %{\n+ predicate(Matcher::vector_length(n) <= 32);\n@@ -9496,2 +9457,1 @@\n- effect(TEMP_DEF dst);\n- format %{ \"mask_all_evexL $dst, $src \\t! mask all operation\" %}\n+ format %{ \"mask_all_evexI_LE32 $dst, $src \\t\" %}\n@@ -9499,9 +9459,2 @@\n- int vec_len = Matcher::vector_length(this);\n- if (VM_Version::supports_avx512bw()) {\n- __ kmovql($dst$$KRegister, $src$$Register);\n- __ kshiftrql($dst$$KRegister, $dst$$KRegister, 64 - vec_len);\n- } else {\n- assert(vec_len <= 16, \"\");\n- __ kmovwl($dst$$KRegister, $src$$Register);\n- __ kshiftrwl($dst$$KRegister, $dst$$KRegister, 16 - vec_len);\n- }\n+ int mask_len = Matcher::vector_length(this);\n+ __ vector_maskall_operation($dst$$KRegister, $src$$Register, mask_len);\n@@ -9512,0 +9465,1 @@\n+#ifdef _LP64\n","filename":"src\/hotspot\/cpu\/x86\/x86.ad","additions":7,"deletions":53,"binary":false,"changes":60,"status":"modified"},{"patch":"@@ -13850,0 +13850,10 @@\n+instruct mask_all_evexL_LT32(kReg dst, eRegL src) %{\n+ predicate(Matcher::vector_length(n) <= 32);\n+ match(Set dst (MaskAll src));\n+ format %{ \"mask_all_evexL_LE32 $dst, $src \\t\" %}\n+ ins_encode %{\n+ int mask_len = Matcher::vector_length(this);\n+ __ vector_maskall_operation($dst$$KRegister, $src$$Register, mask_len);\n+ %}\n+ ins_pipe( pipe_slow );\n+%}\n@@ -13851,0 +13861,23 @@\n+instruct mask_all_evexL_GT32(kReg dst, eRegL src, kReg ktmp) %{\n+ predicate(Matcher::vector_length(n) > 32);\n+ match(Set dst (MaskAll src));\n+ effect(TEMP ktmp);\n+ format %{ \"mask_all_evexL_GT32 $dst, $src \\t! using $ktmp as TEMP \" %}\n+ ins_encode %{\n+ int mask_len = Matcher::vector_length(this);\n+ __ vector_maskall_operation32($dst$$KRegister, $src$$Register, $ktmp$$KRegister, mask_len);\n+ %}\n+ ins_pipe( pipe_slow );\n+%}\n+\n+instruct mask_all_evexI_GT32(kReg dst, rRegI src, kReg ktmp) %{\n+ predicate(Matcher::vector_length(n) > 32);\n+ match(Set dst (MaskAll src));\n+ effect(TEMP ktmp);\n+ format %{ \"mask_all_evexI_GT32 $dst, $src \\t! using $ktmp as TEMP\" %}\n+ ins_encode %{\n+ int mask_len = Matcher::vector_length(this);\n+ __ vector_maskall_operation32($dst$$KRegister, $src$$Register, $ktmp$$KRegister, mask_len);\n+ %}\n+ ins_pipe( pipe_slow );\n+%}\n","filename":"src\/hotspot\/cpu\/x86\/x86_32.ad","additions":33,"deletions":0,"binary":false,"changes":33,"status":"modified"},{"patch":"@@ -13014,0 +13014,23 @@\n+instruct mask_all_evexL(kReg dst, rRegL src) %{\n+ match(Set dst (MaskAll src));\n+ format %{ \"mask_all_evexL $dst, $src \\t! mask all operation\" %}\n+ ins_encode %{\n+ int mask_len = Matcher::vector_length(this);\n+ __ vector_maskall_operation($dst$$KRegister, $src$$Register, mask_len);\n+ %}\n+ ins_pipe( pipe_slow );\n+%}\n+\n+instruct mask_all_evexI_GT32(kReg dst, rRegI src, rRegL tmp) %{\n+ predicate(Matcher::vector_length(n) > 32);\n+ match(Set dst (MaskAll src));\n+ effect(TEMP tmp);\n+ format %{ \"mask_all_evexI_GT32 $dst, $src \\t! using $tmp as TEMP\" %}\n+ ins_encode %{\n+ int mask_len = Matcher::vector_length(this);\n+ __ movslq($tmp$$Register, $src$$Register);\n+ __ vector_maskall_operation($dst$$KRegister, $tmp$$Register, mask_len);\n+ %}\n+ ins_pipe( pipe_slow );\n+%}\n+\n","filename":"src\/hotspot\/cpu\/x86\/x86_64.ad","additions":23,"deletions":0,"binary":false,"changes":23,"status":"modified"},{"patch":"@@ -27,1 +27,1 @@\n- * @run testng\/othervm -ea -esa -Xbatch -XX:-TieredCompilation Byte512VectorTests\n+ * @run testng\/othervm\/timeout=240 -ea -esa -Xbatch -XX:-TieredCompilation Byte512VectorTests\n","filename":"test\/jdk\/jdk\/incubator\/vector\/Byte512VectorTests.java","additions":1,"deletions":1,"binary":false,"changes":2,"status":"modified"},{"patch":"@@ -27,1 +27,1 @@\n- * @run testng\/othervm -ea -esa -Xbatch -XX:-TieredCompilation ByteMaxVectorTests\n+ * @run testng\/othervm\/timeout=240 -ea -esa -Xbatch -XX:-TieredCompilation ByteMaxVectorTests\n","filename":"test\/jdk\/jdk\/incubator\/vector\/ByteMaxVectorTests.java","additions":1,"deletions":1,"binary":false,"changes":2,"status":"modified"},{"patch":"@@ -42,1 +42,1 @@\n- * @run testng\/othervm --add-opens jdk.incubator.vector\/jdk.incubator.vector=ALL-UNNAMED\n+ * @run testng\/othervm\/timeout=240 --add-opens jdk.incubator.vector\/jdk.incubator.vector=ALL-UNNAMED\n","filename":"test\/jdk\/jdk\/incubator\/vector\/VectorReshapeTests.java","additions":1,"deletions":1,"binary":false,"changes":2,"status":"modified"}]}

jdk18/24/03/metadata.json

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{"head":{"repo":{"full_name":"jatin-bhateja\/jdk18","html_url":"https:\/\/github.com\/jatin-bhateja\/jdk18"},"sha":"583062da8d784f295a5047d55ec0d57fc028a633"},"created_at":"2021-12-21T20:08:39.043822629Z","base":{"repo":{"full_name":"openjdk\/jdk18","html_url":"https:\/\/git.openjdk.java.net\/jdk18"},"sha":"475ec8e6c5abc3431344d69bd46395e8c4b46e4c"}}

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