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AlexMacleanAlexMaclean
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[NVPTX] Cleanup ISel code after float register removal, use BasicNVPTXInst (#141711)
1 parent 273e463 commit c3bbc06

22 files changed

+2632
-3082
lines changed

‎llvm/lib/Target/NVPTX/NVPTXForwardParams.cpp‎

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -53,16 +53,10 @@ static bool traverseMoveUse(MachineInstr &U, const MachineRegisterInfo &MRI,
5353
SmallVectorImpl<MachineInstr *> &RemoveList,
5454
SmallVectorImpl<MachineInstr *> &LoadInsts) {
5555
switch (U.getOpcode()) {
56-
case NVPTX::LD_f32:
57-
case NVPTX::LD_f64:
5856
case NVPTX::LD_i16:
5957
case NVPTX::LD_i32:
6058
case NVPTX::LD_i64:
6159
case NVPTX::LD_i8:
62-
case NVPTX::LDV_f32_v2:
63-
case NVPTX::LDV_f32_v4:
64-
case NVPTX::LDV_f64_v2:
65-
case NVPTX::LDV_f64_v4:
6660
case NVPTX::LDV_i16_v2:
6761
case NVPTX::LDV_i16_v4:
6862
case NVPTX::LDV_i32_v2:

‎llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp‎

Lines changed: 46 additions & 72 deletions
Original file line numberDiff line numberDiff line change
@@ -1015,33 +1015,29 @@ void NVPTXDAGToDAGISel::SelectAddrSpaceCast(SDNode *N) {
10151015

10161016
// Helper function template to reduce amount of boilerplate code for
10171017
// opcode selection.
1018-
static std::optional<unsigned> pickOpcodeForVT(
1019-
MVT::SimpleValueType VT, std::optional<unsigned> Opcode_i8,
1020-
std::optional<unsigned> Opcode_i16, std::optional<unsigned> Opcode_i32,
1021-
std::optional<unsigned> Opcode_i64, std::optional<unsigned> Opcode_f32,
1022-
std::optional<unsigned> Opcode_f64) {
1018+
static std::optional<unsigned>
1019+
pickOpcodeForVT(MVT::SimpleValueType VT, std::optional<unsigned> Opcode_i8,
1020+
std::optional<unsigned> Opcode_i16,
1021+
std::optional<unsigned> Opcode_i32,
1022+
std::optional<unsigned> Opcode_i64) {
10231023
switch (VT) {
10241024
case MVT::i1:
10251025
case MVT::i8:
10261026
return Opcode_i8;
1027-
case MVT::i16:
1028-
return Opcode_i16;
1029-
case MVT::i32:
1030-
return Opcode_i32;
1031-
case MVT::i64:
1032-
return Opcode_i64;
10331027
case MVT::f16:
1028+
case MVT::i16:
10341029
case MVT::bf16:
10351030
return Opcode_i16;
10361031
case MVT::v2f16:
10371032
case MVT::v2bf16:
10381033
case MVT::v2i16:
10391034
case MVT::v4i8:
1040-
return Opcode_i32;
1035+
case MVT::i32:
10411036
case MVT::f32:
1042-
return Opcode_f32;
1037+
return Opcode_i32;
1038+
case MVT::i64:
10431039
case MVT::f64:
1044-
return Opcode_f64;
1040+
return Opcode_i64;
10451041
default:
10461042
return std::nullopt;
10471043
}
@@ -1101,9 +1097,8 @@ bool NVPTXDAGToDAGISel::tryLoad(SDNode *N) {
11011097
Chain};
11021098

11031099
const MVT::SimpleValueType TargetVT = LD->getSimpleValueType(0).SimpleTy;
1104-
const std::optional<unsigned> Opcode =
1105-
pickOpcodeForVT(TargetVT, NVPTX::LD_i8, NVPTX::LD_i16, NVPTX::LD_i32,
1106-
NVPTX::LD_i64, NVPTX::LD_f32, NVPTX::LD_f64);
1100+
const std::optional<unsigned> Opcode = pickOpcodeForVT(
1101+
TargetVT, NVPTX::LD_i8, NVPTX::LD_i16, NVPTX::LD_i32, NVPTX::LD_i64);
11071102
if (!Opcode)
11081103
return false;
11091104

@@ -1203,22 +1198,19 @@ bool NVPTXDAGToDAGISel::tryLoadVector(SDNode *N) {
12031198
default:
12041199
return false;
12051200
case NVPTXISD::LoadV2:
1206-
Opcode =
1207-
pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, NVPTX::LDV_i8_v2,
1208-
NVPTX::LDV_i16_v2, NVPTX::LDV_i32_v2, NVPTX::LDV_i64_v2,
1209-
NVPTX::LDV_f32_v2, NVPTX::LDV_f64_v2);
1201+
Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, NVPTX::LDV_i8_v2,
1202+
NVPTX::LDV_i16_v2, NVPTX::LDV_i32_v2,
1203+
NVPTX::LDV_i64_v2);
12101204
break;
12111205
case NVPTXISD::LoadV4:
1212-
Opcode =
1213-
pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, NVPTX::LDV_i8_v4,
1214-
NVPTX::LDV_i16_v4, NVPTX::LDV_i32_v4, NVPTX::LDV_i64_v4,
1215-
NVPTX::LDV_f32_v4, NVPTX::LDV_f64_v4);
1206+
Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, NVPTX::LDV_i8_v4,
1207+
NVPTX::LDV_i16_v4, NVPTX::LDV_i32_v4,
1208+
NVPTX::LDV_i64_v4);
12161209
break;
12171210
case NVPTXISD::LoadV8:
12181211
Opcode =
12191212
pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, {/* no v8i8 */},
1220-
{/* no v8i16 */}, NVPTX::LDV_i32_v8, {/* no v8i64 */},
1221-
NVPTX::LDV_f32_v8, {/* no v8f64 */});
1213+
{/* no v8i16 */}, NVPTX::LDV_i32_v8, {/* no v8i64 */});
12221214
break;
12231215
}
12241216
if (!Opcode)
@@ -1286,48 +1278,42 @@ bool NVPTXDAGToDAGISel::tryLDGLDU(SDNode *N) {
12861278
Opcode = pickOpcodeForVT(
12871279
EltVT.getSimpleVT().SimpleTy, NVPTX::INT_PTX_LDG_GLOBAL_i8,
12881280
NVPTX::INT_PTX_LDG_GLOBAL_i16, NVPTX::INT_PTX_LDG_GLOBAL_i32,
1289-
NVPTX::INT_PTX_LDG_GLOBAL_i64, NVPTX::INT_PTX_LDG_GLOBAL_f32,
1290-
NVPTX::INT_PTX_LDG_GLOBAL_f64);
1281+
NVPTX::INT_PTX_LDG_GLOBAL_i64);
12911282
break;
12921283
case ISD::INTRINSIC_W_CHAIN:
12931284
Opcode = pickOpcodeForVT(
12941285
EltVT.getSimpleVT().SimpleTy, NVPTX::INT_PTX_LDU_GLOBAL_i8,
12951286
NVPTX::INT_PTX_LDU_GLOBAL_i16, NVPTX::INT_PTX_LDU_GLOBAL_i32,
1296-
NVPTX::INT_PTX_LDU_GLOBAL_i64, NVPTX::INT_PTX_LDU_GLOBAL_f32,
1297-
NVPTX::INT_PTX_LDU_GLOBAL_f64);
1287+
NVPTX::INT_PTX_LDU_GLOBAL_i64);
12981288
break;
12991289
case NVPTXISD::LoadV2:
13001290
Opcode = pickOpcodeForVT(
13011291
EltVT.getSimpleVT().SimpleTy, NVPTX::INT_PTX_LDG_G_v2i8_ELE,
13021292
NVPTX::INT_PTX_LDG_G_v2i16_ELE, NVPTX::INT_PTX_LDG_G_v2i32_ELE,
1303-
NVPTX::INT_PTX_LDG_G_v2i64_ELE, NVPTX::INT_PTX_LDG_G_v2f32_ELE,
1304-
NVPTX::INT_PTX_LDG_G_v2f64_ELE);
1293+
NVPTX::INT_PTX_LDG_G_v2i64_ELE);
13051294
break;
13061295
case NVPTXISD::LDUV2:
13071296
Opcode = pickOpcodeForVT(
13081297
EltVT.getSimpleVT().SimpleTy, NVPTX::INT_PTX_LDU_G_v2i8_ELE,
13091298
NVPTX::INT_PTX_LDU_G_v2i16_ELE, NVPTX::INT_PTX_LDU_G_v2i32_ELE,
1310-
NVPTX::INT_PTX_LDU_G_v2i64_ELE, NVPTX::INT_PTX_LDU_G_v2f32_ELE,
1311-
NVPTX::INT_PTX_LDU_G_v2f64_ELE);
1299+
NVPTX::INT_PTX_LDU_G_v2i64_ELE);
13121300
break;
13131301
case NVPTXISD::LoadV4:
13141302
Opcode = pickOpcodeForVT(
13151303
EltVT.getSimpleVT().SimpleTy, NVPTX::INT_PTX_LDG_G_v4i8_ELE,
13161304
NVPTX::INT_PTX_LDG_G_v4i16_ELE, NVPTX::INT_PTX_LDG_G_v4i32_ELE,
1317-
NVPTX::INT_PTX_LDG_G_v4i64_ELE, NVPTX::INT_PTX_LDG_G_v4f32_ELE,
1318-
NVPTX::INT_PTX_LDG_G_v4f64_ELE);
1305+
NVPTX::INT_PTX_LDG_G_v4i64_ELE);
13191306
break;
13201307
case NVPTXISD::LDUV4:
1321-
Opcode = pickOpcodeForVT(
1322-
EltVT.getSimpleVT().SimpleTy, NVPTX::INT_PTX_LDU_G_v4i8_ELE,
1323-
NVPTX::INT_PTX_LDU_G_v4i16_ELE, NVPTX::INT_PTX_LDU_G_v4i32_ELE,
1324-
{/* no v4i64 */}, NVPTX::INT_PTX_LDU_G_v4f32_ELE, {/* no v4f64 */});
1308+
Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy,
1309+
NVPTX::INT_PTX_LDU_G_v4i8_ELE,
1310+
NVPTX::INT_PTX_LDU_G_v4i16_ELE,
1311+
NVPTX::INT_PTX_LDU_G_v4i32_ELE, {/* no v4i64 */});
13251312
break;
13261313
case NVPTXISD::LoadV8:
13271314
Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, {/* no v8i8 */},
13281315
{/* no v8i16 */}, NVPTX::INT_PTX_LDG_G_v8i32_ELE,
1329-
{/* no v8i64 */}, NVPTX::INT_PTX_LDG_G_v8f32_ELE,
1330-
{/* no v8f64 */});
1316+
{/* no v8i64 */});
13311317
break;
13321318
}
13331319
if (!Opcode)
@@ -1421,9 +1407,8 @@ bool NVPTXDAGToDAGISel::tryStore(SDNode *N) {
14211407

14221408
const MVT::SimpleValueType SourceVT =
14231409
Value.getNode()->getSimpleValueType(0).SimpleTy;
1424-
const std::optional<unsigned> Opcode =
1425-
pickOpcodeForVT(SourceVT, NVPTX::ST_i8, NVPTX::ST_i16, NVPTX::ST_i32,
1426-
NVPTX::ST_i64, NVPTX::ST_f32, NVPTX::ST_f64);
1410+
const std::optional<unsigned> Opcode = pickOpcodeForVT(
1411+
SourceVT, NVPTX::ST_i8, NVPTX::ST_i16, NVPTX::ST_i32, NVPTX::ST_i64);
14271412
if (!Opcode)
14281413
return false;
14291414

@@ -1486,22 +1471,19 @@ bool NVPTXDAGToDAGISel::tryStoreVector(SDNode *N) {
14861471
default:
14871472
return false;
14881473
case NVPTXISD::StoreV2:
1489-
Opcode =
1490-
pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, NVPTX::STV_i8_v2,
1491-
NVPTX::STV_i16_v2, NVPTX::STV_i32_v2, NVPTX::STV_i64_v2,
1492-
NVPTX::STV_f32_v2, NVPTX::STV_f64_v2);
1474+
Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, NVPTX::STV_i8_v2,
1475+
NVPTX::STV_i16_v2, NVPTX::STV_i32_v2,
1476+
NVPTX::STV_i64_v2);
14931477
break;
14941478
case NVPTXISD::StoreV4:
1495-
Opcode =
1496-
pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, NVPTX::STV_i8_v4,
1497-
NVPTX::STV_i16_v4, NVPTX::STV_i32_v4, NVPTX::STV_i64_v4,
1498-
NVPTX::STV_f32_v4, NVPTX::STV_f64_v4);
1479+
Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, NVPTX::STV_i8_v4,
1480+
NVPTX::STV_i16_v4, NVPTX::STV_i32_v4,
1481+
NVPTX::STV_i64_v4);
14991482
break;
15001483
case NVPTXISD::StoreV8:
15011484
Opcode =
15021485
pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, {/* no v8i8 */},
1503-
{/* no v8i16 */}, NVPTX::STV_i32_v8, {/* no v8i64 */},
1504-
NVPTX::STV_f32_v8, {/* no v8f64 */});
1486+
{/* no v8i16 */}, NVPTX::STV_i32_v8, {/* no v8i64 */});
15051487
break;
15061488
}
15071489

@@ -1550,21 +1532,18 @@ bool NVPTXDAGToDAGISel::tryLoadParam(SDNode *Node) {
15501532
case 1:
15511533
Opcode = pickOpcodeForVT(MemVT.getSimpleVT().SimpleTy,
15521534
NVPTX::LoadParamMemI8, NVPTX::LoadParamMemI16,
1553-
NVPTX::LoadParamMemI32, NVPTX::LoadParamMemI64,
1554-
NVPTX::LoadParamMemF32, NVPTX::LoadParamMemF64);
1535+
NVPTX::LoadParamMemI32, NVPTX::LoadParamMemI64);
15551536
break;
15561537
case 2:
15571538
Opcode =
15581539
pickOpcodeForVT(MemVT.getSimpleVT().SimpleTy, NVPTX::LoadParamMemV2I8,
15591540
NVPTX::LoadParamMemV2I16, NVPTX::LoadParamMemV2I32,
1560-
NVPTX::LoadParamMemV2I64, NVPTX::LoadParamMemV2F32,
1561-
NVPTX::LoadParamMemV2F64);
1541+
NVPTX::LoadParamMemV2I64);
15621542
break;
15631543
case 4:
15641544
Opcode = pickOpcodeForVT(MemVT.getSimpleVT().SimpleTy,
15651545
NVPTX::LoadParamMemV4I8, NVPTX::LoadParamMemV4I16,
1566-
NVPTX::LoadParamMemV4I32, {/* no v4i64 */},
1567-
NVPTX::LoadParamMemV4F32, {/* no v4f64 */});
1546+
NVPTX::LoadParamMemV4I32, {/* no v4i64 */});
15681547
break;
15691548
}
15701549
if (!Opcode)
@@ -1628,8 +1607,7 @@ bool NVPTXDAGToDAGISel::tryStoreRetval(SDNode *N) {
16281607
case 1:
16291608
Opcode = pickOpcodeForVT(Mem->getMemoryVT().getSimpleVT().SimpleTy,
16301609
NVPTX::StoreRetvalI8, NVPTX::StoreRetvalI16,
1631-
NVPTX::StoreRetvalI32, NVPTX::StoreRetvalI64,
1632-
NVPTX::StoreRetvalF32, NVPTX::StoreRetvalF64);
1610+
NVPTX::StoreRetvalI32, NVPTX::StoreRetvalI64);
16331611
if (Opcode == NVPTX::StoreRetvalI8) {
16341612
// Fine tune the opcode depending on the size of the operand.
16351613
// This helps to avoid creating redundant COPY instructions in
@@ -1649,14 +1627,12 @@ bool NVPTXDAGToDAGISel::tryStoreRetval(SDNode *N) {
16491627
case 2:
16501628
Opcode = pickOpcodeForVT(Mem->getMemoryVT().getSimpleVT().SimpleTy,
16511629
NVPTX::StoreRetvalV2I8, NVPTX::StoreRetvalV2I16,
1652-
NVPTX::StoreRetvalV2I32, NVPTX::StoreRetvalV2I64,
1653-
NVPTX::StoreRetvalV2F32, NVPTX::StoreRetvalV2F64);
1630+
NVPTX::StoreRetvalV2I32, NVPTX::StoreRetvalV2I64);
16541631
break;
16551632
case 4:
16561633
Opcode = pickOpcodeForVT(Mem->getMemoryVT().getSimpleVT().SimpleTy,
16571634
NVPTX::StoreRetvalV4I8, NVPTX::StoreRetvalV4I16,
1658-
NVPTX::StoreRetvalV4I32, {/* no v4i64 */},
1659-
NVPTX::StoreRetvalV4F32, {/* no v4f64 */});
1635+
NVPTX::StoreRetvalV4I32, {/* no v4i64 */});
16601636
break;
16611637
}
16621638
if (!Opcode)
@@ -1827,14 +1803,12 @@ bool NVPTXDAGToDAGISel::tryStoreParam(SDNode *N) {
18271803
// Use immediate version of store param
18281804
Opcode = pickOpcodeForVT(MemTy, NVPTX::StoreParamI8_i,
18291805
NVPTX::StoreParamI16_i, NVPTX::StoreParamI32_i,
1830-
NVPTX::StoreParamI64_i, NVPTX::StoreParamF32_i,
1831-
NVPTX::StoreParamF64_i);
1806+
NVPTX::StoreParamI64_i);
18321807
} else
18331808
Opcode =
18341809
pickOpcodeForVT(Mem->getMemoryVT().getSimpleVT().SimpleTy,
18351810
NVPTX::StoreParamI8_r, NVPTX::StoreParamI16_r,
1836-
NVPTX::StoreParamI32_r, NVPTX::StoreParamI64_r,
1837-
NVPTX::StoreParamF32_r, NVPTX::StoreParamF64_r);
1811+
NVPTX::StoreParamI32_r, NVPTX::StoreParamI64_r);
18381812
if (Opcode == NVPTX::StoreParamI8_r) {
18391813
// Fine tune the opcode depending on the size of the operand.
18401814
// This helps to avoid creating redundant COPY instructions in

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