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[SPIR-V] Add SPV_INTEL_bfloat16_arithmetic for Opencl.std instructions with bfloat16 type (#205128)
For `OpExtInst`, add check for bfloat16 type when it's an OpenCL.std extended instruction, and add requirements for SPV_INTEL_bfloat16_arithmetic if so. Add such check and extension requirement since OpenCL.std extended instruction set can operate on IEEE-754 FP types only, as per the revision from [OpenCL.std spec](https://registry.khronos.org/SPIR-V/specs/unified1/OpenCL.ExtendedInstructionSet.100.html#_changes_from_version_1_0_revision_8) --------- Co-authored-by: Viktoria Maximova <viktoria.maksimova@intel.com>
1 parent b7091e6 commit 4f339ee

2 files changed

Lines changed: 134 additions & 5 deletions

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‎llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp‎

Lines changed: 43 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -14,9 +14,9 @@
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//
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//===----------------------------------------------------------------------===//
1616

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// TODO: uses or report_fatal_error (which is also deprecated) /
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// ReportFatalUsageError in this file should be refactored, as per LLVM
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// best practices, to rely on the Diagnostic infrastructure.
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// TODO: Per LLVM best practices, the report_fatal_error (deprecated) /
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// ReportFatalUsageError calls in this file should be replaced with the
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// Diagnostic infrastructure (e.g. the reportUnsupported function below).
2020

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#include "SPIRVModuleAnalysis.h"
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#include "MCTargetDesc/SPIRVBaseInfo.h"
@@ -56,6 +56,12 @@ char llvm::SPIRVModuleAnalysis::ID = 0;
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INITIALIZE_PASS(SPIRVModuleAnalysis, DEBUG_TYPE, "SPIRV module analysis", true,
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true)
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static void reportUnsupported(const MachineInstr &MI, const char *Msg) {
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const Function &Func = MI.getMF()->getFunction();
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Func.getContext().diagnose(
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DiagnosticInfoUnsupported(Func, Msg, MI.getDebugLoc()));
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}
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// Retrieve an unsigned from an MDNode with a list of them as operands.
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static unsigned getMetadataUInt(MDNode *MdNode, unsigned OpIndex,
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unsigned DefaultVal = 0) {
@@ -1662,8 +1668,40 @@ void addInstrRequirements(const MachineInstr &MI,
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addPrintfRequirements(MI, Reqs, ST);
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break;
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}
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// TODO: handle bfloat16 extended instructions when
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// SPV_INTEL_bfloat16_arithmetic is enabled.
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if (MI.getOperand(2).getImm() ==
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static_cast<int64_t>(SPIRV::InstructionSet::OpenCL_std)) {
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const MachineFunction *MF = MI.getMF();
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const MachineRegisterInfo &MRI = MF->getRegInfo();
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SPIRVGlobalRegistry *GR = ST.getSPIRVGlobalRegistry();
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auto IsBFloat16 = [&](SPIRVTypeInst TypeDef) {
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if (TypeDef && TypeDef->getOpcode() == SPIRV::OpTypeVector)
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TypeDef = MRI.getVRegDef(TypeDef->getOperand(1).getReg());
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return isBFloat16Type(TypeDef);
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};
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// Result type is operand 1; arguments start at operand 4.
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bool UsesBFloat16 = IsBFloat16(MRI.getVRegDef(MI.getOperand(1).getReg()));
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for (unsigned I = 4, E = MI.getNumOperands(); I < E && !UsesBFloat16;
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++I) {
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const MachineOperand &MO = MI.getOperand(I);
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if (MO.isReg())
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UsesBFloat16 = IsBFloat16(GR->getResultType(
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MO.getReg(), const_cast<MachineFunction *>(MF)));
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}
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if (UsesBFloat16) {
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if (!ST.canUseExtension(
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SPIRV::Extension::SPV_INTEL_bfloat16_arithmetic)) {
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reportUnsupported(
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MI, "OpenCL Extended instructions with bfloat16 require the "
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"following SPIR-V extension: SPV_INTEL_bfloat16_arithmetic");
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break;
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}
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Reqs.addExtension(SPIRV::Extension::SPV_INTEL_bfloat16_arithmetic);
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Reqs.addCapability(SPIRV::Capability::BFloat16ArithmeticINTEL);
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}
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}
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break;
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}
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case SPIRV::OpAliasDomainDeclINTEL:

‎llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_arithmetic/bfloat16-ocl-ext.ll‎

Lines changed: 91 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,91 @@
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; RUN: split-file %s %t
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; RUN: not llc -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_bfloat16 %t/bf16_result_operand.ll -o /dev/null 2>&1 | FileCheck %s --check-prefix=RESULT-OPERAND-ERROR
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; RESULT-OPERAND-ERROR: error: <unknown>:0:0: in function test_fabs bfloat (bfloat): OpenCL Extended instructions with bfloat16 require the
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; RESULT-OPERAND-ERROR-SAME: following SPIR-V extension: SPV_INTEL_bfloat16_arithmetic
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; RUN: not llc -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_bfloat16 %t/bf16_result.ll -o /dev/null 2>&1 | FileCheck %s --check-prefix=RESULT-ERROR
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; RESULT-ERROR: error: <unknown>:0:0: in function test_nan bfloat (i16): OpenCL Extended instructions with bfloat16 require the
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; RESULT-ERROR-SAME: following SPIR-V extension: SPV_INTEL_bfloat16_arithmetic
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; RUN: not llc -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_bfloat16 %t/bf16_operand.ll -o /dev/null 2>&1 | FileCheck %s --check-prefix=OPERAND-ERROR
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; OPERAND-ERROR: error: <unknown>:0:0: in function test_ilogb i32 (bfloat): OpenCL Extended instructions with bfloat16 require the
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; OPERAND-ERROR-SAME: following SPIR-V extension: SPV_INTEL_bfloat16_arithmetic
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; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_INTEL_bfloat16_arithmetic,+SPV_KHR_bfloat16 %t/bf16_result_operand.ll -o - | FileCheck %s --check-prefixes=COMMON,BF16_RESULT_OPERAND
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; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_INTEL_bfloat16_arithmetic,+SPV_KHR_bfloat16 %t/bf16_result.ll -o - | FileCheck %s --check-prefixes=COMMON,BF16_RESULT
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; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_INTEL_bfloat16_arithmetic,+SPV_KHR_bfloat16 %t/bf16_operand.ll -o - | FileCheck %s --check-prefixes=COMMON,BF16_OPERAND
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; TODO: re-enable spirv-val once it can verify SPV_INTEL_bfloat16_arithmetic with bfloat16 type on ExtInst
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; RUNx: %if spirv-tools %{ llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_INTEL_bfloat16_arithmetic,+SPV_KHR_bfloat16 %t/bf16_result_operand.ll -o - -filetype=obj | spirv-val %}
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; RUNx: %if spirv-tools %{ llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_INTEL_bfloat16_arithmetic,+SPV_KHR_bfloat16 %t/bf16_result.ll -o - -filetype=obj | spirv-val %}
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; RUNx: %if spirv-tools %{ llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_INTEL_bfloat16_arithmetic,+SPV_KHR_bfloat16 %t/bf16_operand.ll -o - -filetype=obj | spirv-val %}
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; COMMON-DAG: OpCapability BFloat16ArithmeticINTEL
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; COMMON-DAG: OpCapability BFloat16TypeKHR
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; COMMON-DAG: OpExtension "SPV_KHR_bfloat16"
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; COMMON-DAG: OpExtension "SPV_INTEL_bfloat16_arithmetic"
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; COMMON-DAG: [[EXTSET:%.*]] = OpExtInstImport "OpenCL.std"
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; COMMON-DAG: [[BFLOAT:%.*]] = OpTypeFloat 16 0
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; COMMON-DAG: [[BFLOATV:%.*]] = OpTypeVector [[BFLOAT]] 4
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32+
; BF16_RESULT_OPERAND: [[OP:%.*]] = OpFunctionParameter [[BFLOAT]]
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; BF16_RESULT_OPERAND: OpExtInst [[BFLOAT]] [[EXTSET]] fabs [[OP]]
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; BF16_RESULT_OPERAND: [[OPV:%.*]] = OpFunctionParameter [[BFLOATV]]
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; BF16_RESULT_OPERAND: OpExtInst [[BFLOATV]] [[EXTSET]] fabs [[OPV]]
36+
37+
; BF16_RESULT-DAG: [[INT:%.*]] = OpTypeInt 16 0
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; BF16_RESULT-DAG: [[INTV:%.*]] = OpTypeVector [[INT]] 4
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; BF16_RESULT: [[OP:%.*]] = OpFunctionParameter [[INT]]
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; BF16_RESULT: OpExtInst [[BFLOAT]] [[EXTSET]] nan [[OP]]
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; BF16_RESULT: [[OPV:%.*]] = OpFunctionParameter [[INTV]]
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; BF16_RESULT: OpExtInst [[BFLOATV]] [[EXTSET]] nan [[OPV]]
43+
44+
; BF16_OPERAND-DAG: [[INT:%.*]] = OpTypeInt 32 0
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; BF16_OPERAND-DAG: [[INTV:%.*]] = OpTypeVector [[INT]] 4
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; BF16_OPERAND: [[OP:%.*]] = OpFunctionParameter [[BFLOAT]]
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; BF16_OPERAND: OpExtInst [[INT]] [[EXTSET]] ilogb [[OP]]
48+
; BF16_OPERAND: [[OPV:%.*]] = OpFunctionParameter [[BFLOATV]]
49+
; BF16_OPERAND: OpExtInst [[INTV]] [[EXTSET]] ilogb [[OPV]]
50+
51+
;--- bf16_result_operand.ll
52+
define spir_func bfloat @test_fabs(bfloat %x) {
53+
%r = call bfloat @llvm.fabs.bf16(bfloat %x)
54+
ret bfloat %r
55+
}
56+
57+
define spir_func <4 x bfloat> @test_fabsv(<4 x bfloat> %x) {
58+
%r = call <4 x bfloat> @llvm.fabs.v4bf16(<4 x bfloat> %x)
59+
ret <4 x bfloat> %r
60+
}
61+
62+
declare bfloat @llvm.fabs.bf16(bfloat)
63+
declare <4 x bfloat> @llvm.fabs.v4bf16(<4 x bfloat>)
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65+
;--- bf16_result.ll
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define spir_func bfloat @test_nan(i16 %x) {
67+
%r = call bfloat @_Z3nant(i16 %x)
68+
ret bfloat %r
69+
}
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71+
define spir_func <4 x bfloat> @test_nanv(<4 x i16> %x) {
72+
%r = call <4 x bfloat> @_Z3nanDv4_t(<4 x i16> %x)
73+
ret <4 x bfloat> %r
74+
}
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76+
declare bfloat @_Z3nant(i16)
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declare <4 x bfloat> @_Z3nanDv4_t(<4 x i16>)
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;--- bf16_operand.ll
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define spir_func i32 @test_ilogb(bfloat %x) {
81+
%r = call i32 @_Z5ilogbDF16_(bfloat %x)
82+
ret i32 %r
83+
}
84+
85+
define spir_func <4 x i32> @test_ilogbv(<4 x bfloat> %x) {
86+
%r = call <4 x i32> @_Z5ilogbDv4_DF16_(<4 x bfloat> %x)
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ret <4 x i32> %r
88+
}
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90+
declare i32 @_Z5ilogbDF16_(bfloat)
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declare <4 x i32> @_Z5ilogbDv4_DF16_(<4 x bfloat>)

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