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[X86] matchLogicBlend - convert to SDPatternMatch matching. NFC. (#144546)
Removes a LOT of commutative matching.
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llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 7 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -52084,36 +52084,14 @@ static SDValue canonicalizeBitSelect(SDNode *N, const SDLoc &DL,
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return DAG.getNode(ISD::OR, DL, VT, X, Y);
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}
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52087-
// Try to match OR(AND(~MASK,X),AND(MASK,Y)) logic pattern.
52087+
// Try to match OR(ANDNP(MASK,X),AND(MASK,Y)) logic pattern.
52088+
// TODO: Try to match OR(AND(~MASK,X),AND(MASK,Y)) logic pattern.
52089+
// Waiting for ANDNP combine allows other combines to happen that prevent
52090+
// matching.
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static bool matchLogicBlend(SDNode *N, SDValue &X, SDValue &Y, SDValue &Mask) {
52089-
if (N->getOpcode() != ISD::OR)
52090-
return false;
52091-
52092-
SDValue N0 = N->getOperand(0);
52093-
SDValue N1 = N->getOperand(1);
52094-
52095-
// Canonicalize AND to LHS.
52096-
if (N1.getOpcode() == ISD::AND)
52097-
std::swap(N0, N1);
52098-
52099-
// Attempt to match OR(AND(M,Y),ANDNP(M,X)).
52100-
if (N0.getOpcode() != ISD::AND || N1.getOpcode() != X86ISD::ANDNP)
52101-
return false;
52102-
52103-
Mask = N1.getOperand(0);
52104-
X = N1.getOperand(1);
52105-
52106-
// Check to see if the mask appeared in both the AND and ANDNP.
52107-
if (N0.getOperand(0) == Mask)
52108-
Y = N0.getOperand(1);
52109-
else if (N0.getOperand(1) == Mask)
52110-
Y = N0.getOperand(0);
52111-
else
52112-
return false;
52113-
52114-
// TODO: Attempt to match against AND(XOR(-1,M),Y) as well, waiting for
52115-
// ANDNP combine allows other combines to happen that prevent matching.
52116-
return true;
52092+
using namespace SDPatternMatch;
52093+
return sd_match(N, m_Or(m_BinOp(X86ISD::ANDNP, m_Value(Mask), m_Value(X)),
52094+
m_And(m_Deferred(Mask), m_Value(Y))));
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}
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// Try to fold:

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