IDF release/v4.4 6c5fb29c2c

Author: me-no-dev

platform.txt

@@ -326,7 +326,7 @@
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4.1-262-g5e6cffbb14\\"'),
+        ("IDF_VER", '\\"v4.4.1-405-g6c5fb29c2c\\"'),
         "ESP_PLATFORM",
         "_POSIX_READER_WRITER_LOCKS",
         "ARDUINO_ARCH_ESP32",

tools/platformio-build-esp32.py

@@ -320,7 +320,7 @@
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4.1-262-g5e6cffbb14\\"'),
+        ("IDF_VER", '\\"v4.4.1-405-g6c5fb29c2c\\"'),
         "ESP_PLATFORM",
         "_POSIX_READER_WRITER_LOCKS",
         "ARDUINO_ARCH_ESP32",

tools/platformio-build-esp32c3.py

@@ -308,7 +308,7 @@
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4.1-262-g5e6cffbb14\\"'),
+        ("IDF_VER", '\\"v4.4.1-405-g6c5fb29c2c\\"'),
         "ESP_PLATFORM",
         "_POSIX_READER_WRITER_LOCKS",
         "ARDUINO_ARCH_ESP32",

tools/platformio-build-esp32s2.py

@@ -325,7 +325,7 @@
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4.1-262-g5e6cffbb14\\"'),
+        ("IDF_VER", '\\"v4.4.1-405-g6c5fb29c2c\\"'),
         "ESP_PLATFORM",
         "_POSIX_READER_WRITER_LOCKS",
         "ARDUINO_ARCH_ESP32",

tools/platformio-build-esp32s3.py

@@ -9,6 +9,7 @@
 #include <esp_spi_flash.h> /* including in bootloader for error values */
 #include "sdkconfig.h"
 #include "soc/soc_caps.h"
+#include "bootloader_flash_override.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -32,20 +33,21 @@ uint32_t bootloader_read_flash_id(void);
 esp_err_t bootloader_flash_wrap_set(spi_flash_wrap_mode_t mode);
 #endif
 
+/**
+ * @brief Startup flow recommended by XMC. Call at startup before any erase/write operation.
+ *
+ * @return ESP_OK When startup successfully, otherwise ESP_FAIL (indiciating you should reboot before erase/write).
+ */
+esp_err_t bootloader_flash_xmc_startup(void);
+
 /**
   * @brief Unlock Flash write protect.
   *        Please do not call this function in SDK.
   *
   * @note This can be overridden because it's attribute weak.
   */
-esp_err_t bootloader_flash_unlock(void);
+esp_err_t IRAM_ATTR __attribute__((weak)) bootloader_flash_unlock(void);
 
-/**
- * @brief Startup flow recommended by XMC. Call at startup before any erase/write operation.
- *
- * @return ESP_OK When startup successfully, otherwise ESP_FAIL (indiciating you should reboot before erase/write).
- */
-esp_err_t bootloader_flash_xmc_startup(void);
 
 #ifdef __cplusplus
 }

tools/sdk/esp32/bin/bootloader_dio_40m.bin

@@ -0,0 +1,101 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include "esp_err.h"
+#include "esp_attr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef unsigned (*bootloader_flash_read_status_fn_t)(void);
+typedef void (*bootloader_flash_write_status_fn_t)(unsigned);
+
+typedef struct __attribute__((packed))
+{
+    const char *manufacturer;
+    uint8_t mfg_id; /* 8-bit JEDEC manufacturer ID */
+    uint16_t flash_id; /* 16-bit JEDEC flash chip ID */
+    uint16_t id_mask; /* Bits to match on in flash chip ID */
+    bootloader_flash_read_status_fn_t read_status_fn;
+    bootloader_flash_write_status_fn_t write_status_fn;
+    uint8_t status_qio_bit;
+} bootloader_qio_info_t;
+
+/**
+ * @brief Read 8 bit status using RDSR command
+ *
+ * @return Value of SR1.
+ */
+unsigned bootloader_read_status_8b_rdsr(void);
+
+/**
+ * @brief Read 8 bit status (second byte) using RDSR2 command
+ *
+ * @return Value of SR2
+ */
+unsigned bootloader_read_status_8b_rdsr2(void);
+
+/**
+ * @brief Read 16 bit status using RDSR & RDSR2 (low and high bytes)
+ *
+ * @return Value of SR2#SR1.
+ */
+unsigned bootloader_read_status_16b_rdsr_rdsr2(void);
+
+/**
+ * @brief Write 8 bit status using WRSR
+ */
+void bootloader_write_status_8b_wrsr(unsigned new_status);
+
+/**
+ * @brief Write 8 bit status (second byte) using WRSR2.
+ */
+void bootloader_write_status_8b_wrsr2(unsigned new_status);
+
+/**
+ * @brief Write 16 bit status using WRSR, (both write SR1 and SR2)
+ */
+void bootloader_write_status_16b_wrsr(unsigned new_status);
+
+/**
+ * @brief Read 8 bit status of XM25QU64A.
+ *
+ * @return Value of 8 bit SR.
+ */
+unsigned bootloader_read_status_8b_xmc25qu64a(void);
+
+/**
+ * @brief Write 8 bit status for XM25QU64A
+ */
+void bootloader_write_status_8b_xmc25qu64a(unsigned new_status);
+
+/* Array of known flash chips and data to enable Quad I/O mode
+
+   Manufacturer & flash ID can be tested by running "esptool.py
+   flash_id"
+
+   If manufacturer ID matches, and flash ID ORed with flash ID mask
+   matches, enable_qio_mode() will execute "Read Cmd", test if bit
+   number "QIE Bit" is set, and if not set it will call "Write Cmd"
+   with this bit set.
+
+   Searching of this table stops when the first match is found.
+ */
+extern const bootloader_qio_info_t __attribute__((weak)) bootloader_flash_qe_support_list[];
+
+/**
+  * @brief Unlock Flash write protect.
+  *        Please do not call this function in SDK.
+  *
+  * @note This can be overridden because it's attribute weak.
+  */
+esp_err_t IRAM_ATTR __attribute__((weak)) bootloader_flash_unlock(void);
+
+#ifdef __cplusplus
+}
+#endif

tools/sdk/esp32/bin/bootloader_dio_80m.bin

@@ -68,6 +68,8 @@ typedef uint8_t esp_link_key[ESP_BT_OCTET16_LEN];      /* Link Key */
 /// Default GATT interface id
 #define ESP_DEFAULT_GATT_IF             0xff
 
+#define ESP_BLE_PRIM_ADV_INT_MIN            0x000020     /*!< Minimum advertising interval for undirected and low duty cycle directed advertising */
+#define ESP_BLE_PRIM_ADV_INT_MAX            0xFFFFFF     /*!< Maximum advertising interval for undirected and low duty cycle directed advertising */
 #define ESP_BLE_CONN_INT_MIN                0x0006       /*!< relate to BTM_BLE_CONN_INT_MIN in stack/btm_ble_api.h */
 #define ESP_BLE_CONN_INT_MAX                0x0C80       /*!< relate to BTM_BLE_CONN_INT_MAX in stack/btm_ble_api.h */
 #define ESP_BLE_CONN_LATENCY_MAX            499          /*!< relate to ESP_BLE_CONN_LATENCY_MAX in stack/btm_ble_api.h */

tools/sdk/esp32/bin/bootloader_dout_40m.bin

@@ -220,6 +220,7 @@ typedef union {
     struct gattc_disconnect_evt_param {
         esp_gatt_conn_reason_t reason;  /*!< disconnection reason */
         uint16_t conn_id;               /*!< Connection id */
+        uint8_t link_role;              /*!< Link role : master role = 0  ; slave role = 1*/
         esp_bd_addr_t remote_bda;       /*!< Remote bluetooth device address */
     } disconnect;                       /*!< Gatt client callback param of ESP_GATTC_DISCONNECT_EVT */
     /**

tools/sdk/esp32/bin/bootloader_dout_80m.bin

@@ -206,6 +206,7 @@ typedef union {
      */
     struct gatts_disconnect_evt_param {
         uint16_t conn_id;               /*!< Connection id */
+        uint8_t link_role;              /*!< Link role : master role = 0  ; slave role = 1*/
         esp_bd_addr_t remote_bda;       /*!< Remote bluetooth device address */
         esp_gatt_conn_reason_t reason;  /*!< Indicate the reason of disconnection */
     } disconnect;                       /*!< Gatt server callback param of ESP_GATTS_DISCONNECT_EVT */

tools/sdk/esp32/bin/bootloader_qio_40m.bin

@@ -97,7 +97,7 @@ esp_err_t gpio_set_intr_type(gpio_num_t gpio_num, gpio_int_type_t intr_type);
 /**
  * @brief  Enable GPIO module interrupt signal
  *
- * @note Please do not use the interrupt of GPIO36 and GPIO39 when using ADC or Wi-Fi with sleep mode enabled.
+ * @note Please do not use the interrupt of GPIO36 and GPIO39 when using ADC or Wi-Fi and Bluetooth with sleep mode enabled.
  *       Please refer to the comments of `adc1_get_raw`.
  *       Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.
  *       As a workaround, call adc_power_acquire() in the app. This will result in higher power consumption (by ~1mA),

tools/sdk/esp32/bin/bootloader_qio_80m.bin

@@ -429,8 +429,7 @@ esp_err_t i2c_master_stop(i2c_cmd_handle_t cmd_handle);
 /**
  * @brief Send all the queued commands on the I2C bus, in master mode.
  *        The task will be blocked until all the commands have been sent out.
- *        The I2C APIs are not thread-safe, if you want to use one I2C port in different tasks,
- *        you need to take care of the multi-thread issue.
+ *        The I2C port is protected by mutex, so this function is thread-safe.
  *        This function shall only be called in I2C master mode.
  *
  * @param i2c_num I2C port number

tools/sdk/esp32/bin/bootloader_qout_40m.bin

@@ -688,6 +688,16 @@ esp_err_t esp_tls_plain_tcp_connect(const char *host, int hostlen, int port, con
  *             NULL     on Failure
  */
 esp_tls_client_session_t *esp_tls_get_client_session(esp_tls_t *tls);
+
+/**
+ * @brief Free the client session
+ *
+ * This function should be called after esp_tls_get_client_session().
+ *
+ * @param[in]  client_session context as esp_tls_client_session_t
+ *
+ */
+void esp_tls_free_client_session(esp_tls_client_session_t *client_session);
 #endif /* CONFIG_ESP_TLS_CLIENT_SESSION_TICKETS */
 #ifdef __cplusplus
 }

tools/sdk/esp32/bin/bootloader_qout_80m.bin

@@ -104,6 +104,11 @@ esp_err_t set_client_config(const char *hostname, size_t hostlen, esp_tls_cfg_t
  * Internal Callback for mbedtls_get_client_session
  */
 esp_tls_client_session_t *esp_mbedtls_get_client_session(esp_tls_t *tls);
+
+/**
+ * Internal Callback for mbedtls_free_client_session
+ */
+void esp_mbedtls_free_client_session(esp_tls_client_session_t *client_session);
 #endif
 
 /**

tools/sdk/esp32/include/bootloader_support/include/bootloader_flash.h

@@ -95,13 +95,13 @@ static inline bool __attribute__((always_inline)) spinlock_acquire(spinlock_t *l
          */
         result = core_id;
 
-#if defined(CONFIG_ESP32_SPIRAM_SUPPORT)
+#if (CONFIG_ESP32_SPIRAM_SUPPORT || CONFIG_ESP32S3_SPIRAM_SUPPORT)
         if (esp_ptr_external_ram(lock)) {
             compare_and_set_extram(&lock->owner, SPINLOCK_FREE, &result);
         } else {
 #endif
         compare_and_set_native(&lock->owner, SPINLOCK_FREE, &result);
-#if defined(CONFIG_ESP32_SPIRAM_SUPPORT)
+#if (CONFIG_ESP32_SPIRAM_SUPPORT || CONFIG_ESP32S3_SPIRAM_SUPPORT)
         }
 #endif
         if(result != other_core_id) {

tools/sdk/esp32/include/bootloader_support/include/bootloader_flash_override.h

@@ -170,12 +170,27 @@ void esp_phy_disable(void);
  */
 void esp_phy_load_cal_and_init(void);
 
+/**
+ * @brief Initialize backup memory for Phy power up/down
+ */
+void esp_phy_pd_mem_init(void);
+
+/**
+ * @brief Deinitialize backup memory for Phy power up/down
+ */
+void esp_phy_pd_mem_deinit(void);
+
 #if CONFIG_MAC_BB_PD
 /**
  * @brief Initialize backup memory for MAC and Baseband power up/down
  */
 void esp_mac_bb_pd_mem_init(void);
 
+/**
+ * @brief Deinitialize backup memory for MAC and Baseband power up/down
+ */
+void esp_mac_bb_pd_mem_deinit(void);
+
 /**
  * @brief Power up MAC and Baseband
  */

tools/sdk/esp32/include/bt/host/bluedroid/api/include/api/esp_bt_defs.h

@@ -80,8 +80,9 @@ TaskHandle_t pxTaskGetNext( TaskHandle_t pxTask );
  * @note This function should not be used while FreeRTOS is running (as it doesn't acquire any locks).
  * @param pxTask task handle.
  * @param pxTaskSnapshot address of TaskSnapshot_t structure to fill.
+ * @return pdTRUE if operation was successful else pdFALSE
  */
-void vTaskGetSnapshot( TaskHandle_t pxTask, TaskSnapshot_t *pxTaskSnapshot );
+BaseType_t vTaskGetSnapshot( TaskHandle_t pxTask, TaskSnapshot_t *pxTaskSnapshot );
 
 #ifdef __cplusplus
 }

tools/sdk/esp32/include/bt/host/bluedroid/api/include/api/esp_gattc_api.h

@@ -39,7 +39,7 @@ static inline uint32_t IRAM_ATTR cpu_ll_get_core_id(void)
     return id;
 }
 
-static inline uint32_t cpu_ll_get_cycle_count(void)
+static inline uint32_t IRAM_ATTR cpu_ll_get_cycle_count(void)
 {
     uint32_t result;
     RSR(CCOUNT, result);

tools/sdk/esp32/include/bt/host/bluedroid/api/include/api/esp_gatts_api.h

@@ -1,16 +1,8 @@
-// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 // The LL layer for I2C register operations
 
@@ -125,9 +117,28 @@ static inline void i2c_ll_cal_bus_clk(uint32_t source_clk, uint32_t bus_freq, i2
  */
 static inline void i2c_ll_set_bus_timing(i2c_dev_t *hw, i2c_clk_cal_t *bus_cfg)
 {
-    //scl period
-    hw->scl_low_period.period = bus_cfg->scl_low;
-    hw->scl_high_period.period = bus_cfg->scl_high;
+    /* SCL period. According to the TRM, we should always subtract 1 to SCL low period */
+    assert(bus_cfg->scl_low > 0);
+    hw->scl_low_period.period = bus_cfg->scl_low - 1;
+    /* Still according to the TRM, if filter is not enbled, we have to subtract 7,
+     * if SCL filter is enabled, we have to subtract:
+     *   8 if SCL filter is between 0 and 2 (included)
+     *   6 + SCL threshold if SCL filter is between 3 and 7 (included)
+     * to SCL high period */
+    uint16_t scl_high = bus_cfg->scl_high;
+    /* In the "worst" case, we will subtract 13, make sure the result will still be correct */
+    assert(scl_high > 13);
+    if (hw->scl_filter_cfg.en) {
+        if (hw->scl_filter_cfg.thres <= 2) {
+            scl_high -= 8;
+        } else {
+            assert(hw->scl_filter_cfg.thres <= 7);
+            scl_high -= hw->scl_filter_cfg.thres + 6;
+        }
+    } else {
+        scl_high -= 7;
+    }
+    hw->scl_high_period.period = scl_high;
     //sda sample
     hw->sda_hold.time = bus_cfg->sda_hold;
     hw->sda_sample.time = bus_cfg->sda_sample;