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Merge pull request #3086 from cesanta/cywst
Add support for RM2 with STM32F (429, 746)
2 parents fb69016 + fbc1708 commit 2557ab2

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26 files changed

+1387
-17
lines changed

26 files changed

+1387
-17
lines changed

mongoose.c

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -19799,7 +19799,7 @@ static size_t cmsis_rx(void *buf, size_t buflen, struct mg_tcpip_if *ifp) {
1979919799
static struct mg_tcpip_if *s_ifp;
1980019800
static bool s_link, s_auth, s_join;
1980119801

19802-
static bool cyw_init(struct mg_tcpip_driver_cyw_firmware *fw, uint8_t *mac);
19802+
static bool cyw_init(uint8_t *mac);
1980319803
static void cyw_poll(void);
1980419804

1980519805
static bool mg_tcpip_driver_cyw_init(struct mg_tcpip_if *ifp) {
@@ -19811,7 +19811,7 @@ static bool mg_tcpip_driver_cyw_init(struct mg_tcpip_if *ifp) {
1981119811
}
1981219812
s_ifp = ifp;
1981319813
s_link = s_auth = s_join = false;
19814-
if (!cyw_init(d->fw, ifp->mac)) return false;
19814+
if (!cyw_init(ifp->mac)) return false;
1981519815

1981619816
if (d->apmode) {
1981719817
MG_DEBUG(("Starting AP '%s' (%u)", d->apssid, d->apchannel));
@@ -20515,7 +20515,7 @@ static const uint32_t country_code = 'X' + ('X' << 8) + (0 << 16);
2051520515
static bool cyw_spi_init();
2051620516

2051720517
// clang-format off
20518-
static bool cyw_init(struct mg_tcpip_driver_cyw_firmware *fw, uint8_t *mac) {
20518+
static bool cyw_init(uint8_t *mac) {
2051920519
uint32_t val = 0;
2052020520
if (!cyw_spi_init()) return false; // BUS DEPENDENCY
2052120521
// BT-ENABLED DEPENDENCY
@@ -20802,12 +20802,13 @@ static bool cyw_spi_init() {
2080220802
if (times == ~0) return false;
2080320803
// DS 4.2.3 Table 6. Chip starts in 16-bit little-endian mode.
2080420804
// Configure SPI and switch to 32-bit big-endian mode:
20805-
// - High-speed mode
20805+
// - High-speed mode: d->hs true
2080620806
// - IRQ POLARITY high
2080720807
// - SPI RESPONSE DELAY 4 bytes time [not in DS] TODO(scaprile): logic ana
2080820808
// - Status not sent after command, IRQ with status
20809-
val = sw16_2(0x000204b3); // 4 reg content
20809+
val = sw16_2(0x000204a3 | (d->hs ? MG_BIT(4) : 0)); // 4 reg content
2081020810
cyw_spi_write(CYW_SD_FUNC_BUS | CYW_SD_16bMODE, CYW_BUS_SPI_BUSCTRL, &val, sizeof(val));
20811+
mg_tcpip_call(s_ifp, MG_TCPIP_EV_DRIVER, NULL);
2081120812
cyw_spi_read(CYW_SD_FUNC_BUS, CYW_BUS_SPI_TEST, &val, sizeof(val));
2081220813
if (val != 0xFEEDBEAD) return false;
2081320814
val = 4; cyw_spi_write(CYW_SD_FUNC_BUS, CYW_BUS_SPI_RESPDLY_F1, &val, 1);

mongoose.h

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2830,6 +2830,7 @@ enum {
28302830
MG_TCPIP_EV_WIFI_SCAN_RESULT, // Wi-Fi scan results struct mg_wifi_scan_bss_data *
28312831
MG_TCPIP_EV_WIFI_SCAN_END, // Wi-Fi scan has finished NULL
28322832
MG_TCPIP_EV_WIFI_CONNECT_ERR, // Wi-Fi connect has failed driver and chip specific
2833+
MG_TCPIP_EV_DRIVER, // Driver event driver specific
28332834
MG_TCPIP_EV_USER // Starting ID for user events
28342835
};
28352836

@@ -2997,11 +2998,11 @@ struct mg_tcpip_spi_ {
29972998
};
29982999

29993000
struct mg_tcpip_driver_cyw_firmware {
3000-
const uint8_t * code_addr;
3001+
const uint8_t *code_addr;
30013002
size_t code_len;
3002-
const uint8_t * nvram_addr;
3003+
const uint8_t *nvram_addr;
30033004
size_t nvram_len;
3004-
const uint8_t * clm_addr;
3005+
const uint8_t *clm_addr;
30053006
size_t clm_len;
30063007
};
30073008

@@ -3016,6 +3017,7 @@ struct mg_tcpip_driver_cyw_data {
30163017
uint8_t apsecurity; // TBD
30173018
uint8_t apchannel;
30183019
bool apmode; // start in AP mode; 'false' starts connection to 'ssid' if not NULL
3020+
bool hs; // use chip "high-speed" mode; otherwise SPI CPOL0 CPHA0 (DS 4.2.3 Table 6)
30193021
};
30203022

30213023
#if 0

src/drivers/cyw.c

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@
77
static struct mg_tcpip_if *s_ifp;
88
static bool s_link, s_auth, s_join;
99

10-
static bool cyw_init(struct mg_tcpip_driver_cyw_firmware *fw, uint8_t *mac);
10+
static bool cyw_init(uint8_t *mac);
1111
static void cyw_poll(void);
1212

1313
static bool mg_tcpip_driver_cyw_init(struct mg_tcpip_if *ifp) {
@@ -19,7 +19,7 @@ static bool mg_tcpip_driver_cyw_init(struct mg_tcpip_if *ifp) {
1919
}
2020
s_ifp = ifp;
2121
s_link = s_auth = s_join = false;
22-
if (!cyw_init(d->fw, ifp->mac)) return false;
22+
if (!cyw_init(ifp->mac)) return false;
2323

2424
if (d->apmode) {
2525
MG_DEBUG(("Starting AP '%s' (%u)", d->apssid, d->apchannel));
@@ -723,7 +723,7 @@ static const uint32_t country_code = 'X' + ('X' << 8) + (0 << 16);
723723
static bool cyw_spi_init();
724724

725725
// clang-format off
726-
static bool cyw_init(struct mg_tcpip_driver_cyw_firmware *fw, uint8_t *mac) {
726+
static bool cyw_init(uint8_t *mac) {
727727
uint32_t val = 0;
728728
if (!cyw_spi_init()) return false; // BUS DEPENDENCY
729729
// BT-ENABLED DEPENDENCY
@@ -1010,12 +1010,13 @@ static bool cyw_spi_init() {
10101010
if (times == ~0) return false;
10111011
// DS 4.2.3 Table 6. Chip starts in 16-bit little-endian mode.
10121012
// Configure SPI and switch to 32-bit big-endian mode:
1013-
// - High-speed mode
1013+
// - High-speed mode: d->hs true
10141014
// - IRQ POLARITY high
10151015
// - SPI RESPONSE DELAY 4 bytes time [not in DS] TODO(scaprile): logic ana
10161016
// - Status not sent after command, IRQ with status
1017-
val = sw16_2(0x000204b3); // 4 reg content
1017+
val = sw16_2(0x000204a3 | (d->hs ? MG_BIT(4) : 0)); // 4 reg content
10181018
cyw_spi_write(CYW_SD_FUNC_BUS | CYW_SD_16bMODE, CYW_BUS_SPI_BUSCTRL, &val, sizeof(val));
1019+
mg_tcpip_call(s_ifp, MG_TCPIP_EV_DRIVER, NULL);
10191020
cyw_spi_read(CYW_SD_FUNC_BUS, CYW_BUS_SPI_TEST, &val, sizeof(val));
10201021
if (val != 0xFEEDBEAD) return false;
10211022
val = 4; cyw_spi_write(CYW_SD_FUNC_BUS, CYW_BUS_SPI_RESPDLY_F1, &val, 1);

src/drivers/cyw.h

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -11,11 +11,11 @@ struct mg_tcpip_spi_ {
1111
};
1212

1313
struct mg_tcpip_driver_cyw_firmware {
14-
const uint8_t * code_addr;
14+
const uint8_t *code_addr;
1515
size_t code_len;
16-
const uint8_t * nvram_addr;
16+
const uint8_t *nvram_addr;
1717
size_t nvram_len;
18-
const uint8_t * clm_addr;
18+
const uint8_t *clm_addr;
1919
size_t clm_len;
2020
};
2121

@@ -30,6 +30,7 @@ struct mg_tcpip_driver_cyw_data {
3030
uint8_t apsecurity; // TBD
3131
uint8_t apchannel;
3232
bool apmode; // start in AP mode; 'false' starts connection to 'ssid' if not NULL
33+
bool hs; // use chip "high-speed" mode; otherwise SPI CPOL0 CPHA0 (DS 4.2.3 Table 6)
3334
};
3435

3536
#if 0

src/net_builtin.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,7 @@ enum {
2626
MG_TCPIP_EV_WIFI_SCAN_RESULT, // Wi-Fi scan results struct mg_wifi_scan_bss_data *
2727
MG_TCPIP_EV_WIFI_SCAN_END, // Wi-Fi scan has finished NULL
2828
MG_TCPIP_EV_WIFI_CONNECT_ERR, // Wi-Fi connect has failed driver and chip specific
29+
MG_TCPIP_EV_DRIVER, // Driver event driver specific
2930
MG_TCPIP_EV_USER // Starting ID for user events
3031
};
3132

tutorials/pico-sdk/rm2-pico-picosdk-baremetal-builtin/main.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -112,7 +112,7 @@ static void mif_fn(struct mg_tcpip_if *ifp, int ev, void *ev_data) {
112112

113113

114114
static struct mg_tcpip_driver_cyw_data d = {
115-
(struct mg_tcpip_spi_ *)&spi, (struct mg_tcpip_driver_cyw_firmware *)&fw, WIFI_SSID, WIFI_PASS, "mongoose", "mongoose", 0, 0, 10, true};
115+
(struct mg_tcpip_spi_ *)&spi, (struct mg_tcpip_driver_cyw_firmware *)&fw, WIFI_SSID, WIFI_PASS, "mongoose", "mongoose", 0, 0, 10, true, true};
116116

117117
int main(void) {
118118
// initialize stdio
Lines changed: 41 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,41 @@
1+
CFLAGS = -W -Wall -Wextra -Werror -Wundef -Wshadow -Wdouble-promotion
2+
CFLAGS += -Wformat-truncation -fno-common -Wconversion -Wno-sign-conversion
3+
CFLAGS += -g3 -Os -ffunction-sections -fdata-sections
4+
CFLAGS += -I. -Icmsis_core/CMSIS/Core/Include -Icmsis_mcu/Include
5+
CFLAGS += -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 $(CFLAGS_EXTRA)
6+
LDFLAGS ?= -Tlink.ld -nostdlib -nostartfiles --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map
7+
8+
SOURCES = main.c syscalls.c sysinit.c
9+
SOURCES += cmsis_mcu/Source/Templates/gcc/startup_stm32f429xx.s # ST startup file. Compiler-dependent!
10+
11+
CFLAGS += -Wno-comment
12+
13+
# Mongoose options are defined in mongoose_config.h
14+
SOURCES += mongoose.c
15+
16+
RM = rm -rf
17+
ifeq ($(OS),Windows_NT)
18+
RM = cmd /C del /Q /F /S
19+
endif
20+
21+
all build example: firmware.bin
22+
23+
firmware.bin: firmware.elf
24+
arm-none-eabi-objcopy -O binary $< $@
25+
26+
firmware.elf: cmsis_core cmsis_mcu pico-sdk $(SOURCES) hal.h link.ld Makefile
27+
arm-none-eabi-gcc $(SOURCES) $(CFLAGS) $(LDFLAGS) -o $@
28+
29+
flash: firmware.bin
30+
st-flash --reset write $< 0x8000000
31+
32+
cmsis_core: # ARM CMSIS core headers
33+
git clone --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@
34+
cmsis_mcu: # Keil CMSIS headers and drivers for STM32F4 series (CMSIS-pack)
35+
git clone --depth 1 -b v2.6.9 https://github.com/STMicroelectronics/cmsis_device_f4 $@
36+
37+
pico-sdk:
38+
git clone --depth 1 --no-checkout -b 2.1.0 https://github.com/raspberrypi/pico-sdk $@ && cd $@ && git sparse-checkout set lib/cyw43-driver && git checkout && git submodule update --init lib/cyw43-driver
39+
40+
clean:
41+
$(RM) firmware.* *.su cmsis_core cmsis_mcu* pico-sdk
Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,20 @@
1+
2+
# RM2 with a NUCLEO-F429ZI
3+
4+
The RM2 is a breakout containing the Wi-Fi subsection of a Raspberry Pi Pico W (or Pico 2 W), that is, a CYW43439, related circuitry, and antenna.
5+
6+
Connect both modules as pin definitions in hal.h suggest, **keep short wires**
7+
8+
9+
| Signal | GPIO | CN7 pin | | RM2 pin | RM2 signal |
10+
|---------|------|---------|-------------|---------|------------|
11+
| DATAPIN | PB5 | 13 | ───┐─────── | 9 | DAT |
12+
| MISOPIN | PB4 | 19 | ───┘ | | |
13+
| CLKPIN | PB3 | 15 | ─────────── | 8 | CLK |
14+
| CSPIN | PA4 | 17 | ─────────── | 10 | CS |
15+
| PWRPIN | PC7 | 11 | ─────────── | 11 | WL ON |
16+
17+
| Signal | GPIO | CN8 pin | | RM2 pin | RM2 signal |
18+
|---------|------|---------|-------------|---------|------------|
19+
| +3V3 | | 7 | ─────────── | 12 | 3V3 |
20+
| GND | | 11 | ─────────── | 7 | (-) |

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