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Re-org SIMD code structure for non-x86 target (#611)
1 parent 46db353 commit 7706e4b

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2 files changed

+48
-22
lines changed

2 files changed

+48
-22
lines changed

core/iwasm/compilation/simd/simd_access_lanes.c

Lines changed: 13 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -90,7 +90,6 @@ aot_compile_simd_shuffle(AOTCompContext *comp_ctx,
9090
return false;
9191
}
9292

93-
/* TODO: instructions for other CPUs */
9493
/* shufflevector is not an option, since it requires *mask as a const */
9594
bool
9695
aot_compile_simd_swizzle_x86(AOTCompContext *comp_ctx, AOTFuncContext *func_ctx)
@@ -158,17 +157,13 @@ aot_compile_simd_swizzle_x86(AOTCompContext *comp_ctx, AOTFuncContext *func_ctx)
158157
return false;
159158
}
160159

161-
bool
162-
aot_compile_simd_swizzle(AOTCompContext *comp_ctx, AOTFuncContext *func_ctx)
160+
static bool
161+
aot_compile_simd_swizzle_common(AOTCompContext *comp_ctx, AOTFuncContext *func_ctx)
163162
{
164163
LLVMValueRef vector, mask, default_lane_value, condition, max_lane_id,
165164
result, idx, id, replace_with_zero, elem, elem_or_zero, undef;
166165
uint8 i;
167166

168-
if (is_target_x86(comp_ctx)) {
169-
return aot_compile_simd_swizzle_x86(comp_ctx, func_ctx);
170-
}
171-
172167
int const_lane_ids[16] = { 16, 16, 16, 16, 16, 16, 16, 16,
173168
16, 16, 16, 16, 16, 16, 16, 16 },
174169
const_zeors[16] = { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
@@ -261,6 +256,17 @@ aot_compile_simd_swizzle(AOTCompContext *comp_ctx, AOTFuncContext *func_ctx)
261256
return false;
262257
}
263258

259+
bool
260+
aot_compile_simd_swizzle(AOTCompContext *comp_ctx, AOTFuncContext *func_ctx)
261+
{
262+
if (is_target_x86(comp_ctx)) {
263+
return aot_compile_simd_swizzle_x86(comp_ctx, func_ctx);
264+
}
265+
else {
266+
return aot_compile_simd_swizzle_common(comp_ctx, func_ctx);
267+
}
268+
}
269+
264270
static bool
265271
aot_compile_simd_extract(AOTCompContext *comp_ctx,
266272
AOTFuncContext *func_ctx,

core/iwasm/compilation/simd/simd_conversions.c

Lines changed: 35 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -153,21 +153,16 @@ aot_compile_simd_i16x8_narrow_i32x4_x86(AOTCompContext *comp_ctx,
153153
is_signed ? "llvm.x86.sse2.packssdw.128" : "llvm.x86.sse41.packusdw");
154154
}
155155

156-
bool
157-
aot_compile_simd_i8x16_narrow_i16x8(AOTCompContext *comp_ctx,
158-
AOTFuncContext *func_ctx,
159-
bool is_signed)
156+
static bool
157+
aot_compile_simd_i8x16_narrow_i16x8_common(AOTCompContext *comp_ctx,
158+
AOTFuncContext *func_ctx,
159+
bool is_signed)
160160
{
161161
LLVMValueRef vector1, vector2, result, vector_min, vector_max, shuffle,
162162
vector1_clamped, vector2_clamped, vector1_trunced, vector2_trunced,
163163
shuffle_vector;
164164
LLVMValueRef v1_gt_max, v1_lt_min, v2_gt_max, v2_lt_min;
165165

166-
if (is_target_x86(comp_ctx)) {
167-
return aot_compile_simd_i8x16_narrow_i16x8_x86(comp_ctx, func_ctx,
168-
is_signed);
169-
}
170-
171166
int min_s_array[8] = { 0xff80, 0xff80, 0xff80, 0xff80,
172167
0xff80, 0xff80, 0xff80, 0xff80 };
173168
int max_s_array[8] = { 0x007f, 0x007f, 0x007f, 0x007f,
@@ -290,20 +285,30 @@ aot_compile_simd_i8x16_narrow_i16x8(AOTCompContext *comp_ctx,
290285
}
291286

292287
bool
293-
aot_compile_simd_i16x8_narrow_i32x4(AOTCompContext *comp_ctx,
288+
aot_compile_simd_i8x16_narrow_i16x8(AOTCompContext *comp_ctx,
294289
AOTFuncContext *func_ctx,
295290
bool is_signed)
291+
{
292+
if (is_target_x86(comp_ctx)) {
293+
return aot_compile_simd_i8x16_narrow_i16x8_x86(comp_ctx, func_ctx,
294+
is_signed);
295+
}
296+
else {
297+
return aot_compile_simd_i8x16_narrow_i16x8_common(comp_ctx, func_ctx,
298+
is_signed);
299+
}
300+
}
301+
302+
static bool
303+
aot_compile_simd_i16x8_narrow_i32x4_common(AOTCompContext *comp_ctx,
304+
AOTFuncContext *func_ctx,
305+
bool is_signed)
296306
{
297307
LLVMValueRef vector1, vector2, result, vector_min, vector_max, shuffle,
298308
vector1_clamped, vector2_clamped, vector1_trunced, vector2_trunced,
299309
shuffle_vector;
300310
LLVMValueRef v1_gt_max, v1_lt_min, v2_gt_max, v2_lt_min;
301311

302-
if (is_target_x86(comp_ctx)) {
303-
return aot_compile_simd_i16x8_narrow_i32x4_x86(comp_ctx, func_ctx,
304-
is_signed);
305-
}
306-
307312
int min_s_array[4] = { 0xffff8000, 0xffff8000, 0xffff8000, 0xffff8000 };
308313
int32 max_s_array[4] = { 0x00007fff, 0x00007fff, 0x00007fff, 0x00007fff };
309314

@@ -420,6 +425,21 @@ aot_compile_simd_i16x8_narrow_i32x4(AOTCompContext *comp_ctx,
420425
return false;
421426
}
422427

428+
bool
429+
aot_compile_simd_i16x8_narrow_i32x4(AOTCompContext *comp_ctx,
430+
AOTFuncContext *func_ctx,
431+
bool is_signed)
432+
{
433+
if (is_target_x86(comp_ctx)) {
434+
return aot_compile_simd_i16x8_narrow_i32x4_x86(comp_ctx, func_ctx,
435+
is_signed);
436+
}
437+
else {
438+
return aot_compile_simd_i16x8_narrow_i32x4_common(comp_ctx, func_ctx,
439+
is_signed);
440+
}
441+
}
442+
423443
bool
424444
aot_compile_simd_i16x8_widen_i8x16(AOTCompContext *comp_ctx,
425445
AOTFuncContext *func_ctx,

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