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philmdrth7680
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exec/memory_ldst_cached: Sort declarations
To ease the file review, sort the declarations by the size of the access (8, 16, 32). Simple code movement, no logical change. Signed-off-by: Philippe Mathieu-Daudé <[email protected]> Message-Id: <[email protected]> Signed-off-by: Richard Henderson <[email protected]>
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include/exec/memory_ldst_cached.h.inc

Lines changed: 20 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,18 @@
2424
#define LD_P(size) \
2525
glue(glue(ld, size), glue(ENDIANNESS, _p))
2626

27+
static inline uint32_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache,
28+
hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
29+
{
30+
assert(addr < cache->len && 2 <= cache->len - addr);
31+
fuzz_dma_read_cb(cache->xlat + addr, 2, cache->mrs.mr);
32+
if (likely(cache->ptr)) {
33+
return LD_P(uw)(cache->ptr + addr);
34+
} else {
35+
return ADDRESS_SPACE_LD_CACHED_SLOW(uw)(cache, addr, attrs, result);
36+
}
37+
}
38+
2739
static inline uint32_t ADDRESS_SPACE_LD_CACHED(l)(MemoryRegionCache *cache,
2840
hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
2941
{
@@ -48,18 +60,6 @@ static inline uint64_t ADDRESS_SPACE_LD_CACHED(q)(MemoryRegionCache *cache,
4860
}
4961
}
5062

51-
static inline uint32_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache,
52-
hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
53-
{
54-
assert(addr < cache->len && 2 <= cache->len - addr);
55-
fuzz_dma_read_cb(cache->xlat + addr, 2, cache->mrs.mr);
56-
if (likely(cache->ptr)) {
57-
return LD_P(uw)(cache->ptr + addr);
58-
} else {
59-
return ADDRESS_SPACE_LD_CACHED_SLOW(uw)(cache, addr, attrs, result);
60-
}
61-
}
62-
6363
#undef ADDRESS_SPACE_LD_CACHED
6464
#undef ADDRESS_SPACE_LD_CACHED_SLOW
6565
#undef LD_P
@@ -71,25 +71,25 @@ static inline uint32_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache,
7171
#define ST_P(size) \
7272
glue(glue(st, size), glue(ENDIANNESS, _p))
7373

74-
static inline void ADDRESS_SPACE_ST_CACHED(l)(MemoryRegionCache *cache,
74+
static inline void ADDRESS_SPACE_ST_CACHED(w)(MemoryRegionCache *cache,
7575
hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
7676
{
77-
assert(addr < cache->len && 4 <= cache->len - addr);
77+
assert(addr < cache->len && 2 <= cache->len - addr);
7878
if (likely(cache->ptr)) {
79-
ST_P(l)(cache->ptr + addr, val);
79+
ST_P(w)(cache->ptr + addr, val);
8080
} else {
81-
ADDRESS_SPACE_ST_CACHED_SLOW(l)(cache, addr, val, attrs, result);
81+
ADDRESS_SPACE_ST_CACHED_SLOW(w)(cache, addr, val, attrs, result);
8282
}
8383
}
8484

85-
static inline void ADDRESS_SPACE_ST_CACHED(w)(MemoryRegionCache *cache,
85+
static inline void ADDRESS_SPACE_ST_CACHED(l)(MemoryRegionCache *cache,
8686
hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
8787
{
88-
assert(addr < cache->len && 2 <= cache->len - addr);
88+
assert(addr < cache->len && 4 <= cache->len - addr);
8989
if (likely(cache->ptr)) {
90-
ST_P(w)(cache->ptr + addr, val);
90+
ST_P(l)(cache->ptr + addr, val);
9191
} else {
92-
ADDRESS_SPACE_ST_CACHED_SLOW(w)(cache, addr, val, attrs, result);
92+
ADDRESS_SPACE_ST_CACHED_SLOW(l)(cache, addr, val, attrs, result);
9393
}
9494
}
9595

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