[test] turn on flash scrambling and ECC in power virus test

Since these parameters are toggled on by the ROM via an OTP setting,
this adds a custom OTP image for the power virus test. While these
settings could be configured directly in the test, doing so via OTP
enables a more realistic test scenario.

Signed-off-by: Timothy Trippel <[email protected]>

Author: timothytrippel

hw/ip/otp_ctrl/data/otp_ctrl_img_creator_sw_cfg.hjson

@@ -33,7 +33,10 @@
                 },
                 {
                     name: "CREATOR_SW_CFG_FLASH_DATA_DEFAULT_CFG",
-                    // Default value for flash scramble / ecc / he_en
+                    // Default values for flash scramble / ecc / he_en. This OTP
+                    // word contains byte-aligned, packed, 4-bit mubi values.
+                    // See the flash_ctrl driver bitfield definitions in
+                    // sw/device/silicon_creator/lib/drivers/flash_ctrl.h.
                     value: "0x0",
                 },
                 {

sw/device/tests/BUILD

@@ -11,6 +11,8 @@ load(
     "opentitan_functest",
     "verilator_params",
 )
+load("//rules:splice.bzl", "bitstream_splice")
+load("//rules:otp.bzl", "STD_OTP_OVERLAYS", "otp_image", "otp_json", "otp_partition")
 
 package(default_visibility = ["//visibility:public"])
 
@@ -2051,10 +2053,41 @@ opentitan_functest(
     ],
 )
 
+otp_json(
+    name = "power_virus_systemtest_otp_overlay",
+    partitions = [
+        otp_partition(
+            name = "CREATOR_SW_CFG",
+            items = {
+                "CREATOR_SW_CFG_FLASH_DATA_DEFAULT_CFG": "0000090606",
+            },
+        ),
+    ],
+)
+
+otp_image(
+    name = "power_virus_systemtest_otp_img_rma",
+    src = "//hw/ip/otp_ctrl/data:otp_json_rma",
+    overlays = STD_OTP_OVERLAYS + [":power_virus_systemtest_otp_overlay"],
+    visibility = ["//visibility:private"],
+)
+
+bitstream_splice(
+    name = "power_virus_systemtest_bitstream",
+    src = "//hw/bitstream:test_rom",
+    data = ":power_virus_systemtest_otp_img_rma",
+    meminfo = "//hw/bitstream:otp_mmi",
+    tags = ["vivado"],
+    update_usr_access = True,
+    visibility = ["//visibility:private"],
+)
+
 opentitan_functest(
     name = "power_virus_systemtest",
     srcs = ["power_virus_systemtest.c"],
     cw310 = cw310_params(
+        bitstream = ":power_virus_systemtest_bitstream",
+        tags = ["vivado"],
         test_cmds = [
             "--rom-kind={rom_kind}",
             "--bitstream=\"$(location {bitstream})\"",
@@ -2080,12 +2113,14 @@ opentitan_functest(
         "//hw/ip/uart/data:uart_regs",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:math",
+        "//sw/device/lib/base:multibits",
         "//sw/device/lib/dif:adc_ctrl",
         "//sw/device/lib/dif:aes",
         "//sw/device/lib/dif:csrng",
         "//sw/device/lib/dif:csrng_shared",
         "//sw/device/lib/dif:edn",
         "//sw/device/lib/dif:entropy_src",
+        "//sw/device/lib/dif:flash_ctrl",
         "//sw/device/lib/dif:gpio",
         "//sw/device/lib/dif:hmac",
         "//sw/device/lib/dif:i2c",

sw/device/tests/power_virus_systemtest.c

@@ -4,12 +4,14 @@
 
 #include "hw/ip/aes/model/aes_modes.h"
 #include "sw/device/lib/base/math.h"
+#include "sw/device/lib/base/multibits.h"
 #include "sw/device/lib/dif/dif_adc_ctrl.h"
 #include "sw/device/lib/dif/dif_aes.h"
 #include "sw/device/lib/dif/dif_csrng.h"
 #include "sw/device/lib/dif/dif_csrng_shared.h"
 #include "sw/device/lib/dif/dif_edn.h"
 #include "sw/device/lib/dif/dif_entropy_src.h"
+#include "sw/device/lib/dif/dif_flash_ctrl.h"
 #include "sw/device/lib/dif/dif_gpio.h"
 #include "sw/device/lib/dif/dif_hmac.h"
 #include "sw/device/lib/dif/dif_i2c.h"
@@ -68,6 +70,7 @@ static dif_uart_t uart_2;
 static dif_uart_t uart_3;
 static dif_pattgen_t pattgen;
 static dif_pwm_t pwm;
+static dif_flash_ctrl_state_t flash_ctrl;
 
 static const dif_i2c_t *i2c_handles[] = {&i2c_0, &i2c_1, &i2c_2};
 static const dif_uart_t *uart_handles[] = {&uart_1, &uart_2, &uart_3};
@@ -274,6 +277,9 @@ static void init_peripheral_handles(void) {
       mmio_region_from_addr(TOP_EARLGREY_PATTGEN_BASE_ADDR), &pattgen));
   CHECK_DIF_OK(dif_pwm_init(
       mmio_region_from_addr(TOP_EARLGREY_PWM_AON_BASE_ADDR), &pwm));
+  CHECK_DIF_OK(dif_flash_ctrl_init_state(
+      &flash_ctrl,
+      mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR)));
 }
 
 static void configure_pinmux(void) {
@@ -827,9 +833,8 @@ static void max_power_task(void *task_parameters) {
         dif_uart_rx_bytes_available(uart_handles[i], &num_uart_rx_bytes));
     // Note, we don't care if all bytes have been transmitted out of the UART
     // by the time the fastest processing crypto block (i.e., the AES) has
-    // completed. Likely, we won't have transimitted all data since the UART
-    // is quite a bit slower. We just check that what was transmitted is
-    // correct.
+    // completed. Likely, we won't have transmitted all data since the UART is
+    // quite a bit slower. We just check that what was transmitted is correct.
     memset((void *)received_uart_data, 0, kUartFifoDepth);
     CHECK_DIF_OK(dif_uart_bytes_receive(uart_handles[i], num_uart_rx_bytes,
                                         received_uart_data, NULL));
@@ -839,6 +844,15 @@ static void max_power_task(void *task_parameters) {
   OTTF_TASK_DELETE_SELF_OR_DIE;
 }
 
+static void check_otp_csr_configs(void) {
+  dif_flash_ctrl_region_properties_t default_properties;
+  CHECK_DIF_OK(dif_flash_ctrl_get_default_region_properties(
+      &flash_ctrl, &default_properties));
+  CHECK(default_properties.scramble_en == kMultiBitBool4True);
+  CHECK(default_properties.ecc_en == kMultiBitBool4True);
+  CHECK(default_properties.high_endurance_en == kMultiBitBool4False);
+}
+
 bool test_main(void) {
   peripheral_clock_period_ns =
       udiv64_slow(1000000000, kClockFreqPeripheralHz, NULL);
@@ -871,6 +885,11 @@ bool test_main(void) {
   configure_pwm();
   LOG_INFO("All IPs configured.");
 
+  // ***************************************************************************
+  // Check OTP configurations propagated to CSRs.
+  // ***************************************************************************
+  check_otp_csr_configs();
+
   // ***************************************************************************
   // Kick off test tasks.
   // ***************************************************************************

sw/host/tests/chip/power_virus/BUILD

@@ -16,6 +16,7 @@ rust_binary(
         "//third_party/rust/crates:anyhow",
         "//third_party/rust/crates:humantime",
         "//third_party/rust/crates:log",
+        "//third_party/rust/crates:regex",
         "//third_party/rust/crates:structopt",
     ],
 )

sw/host/tests/chip/power_virus/src/main.rs

@@ -2,12 +2,15 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::Result;
+use anyhow::{anyhow, Result};
+use regex::Regex;
 use std::time::Duration;
 use structopt::StructOpt;
 
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
 use opentitanlib::test_utils::init::InitializeTest;
-use opentitanlib::uart::console::UartConsole;
+use opentitanlib::uart::console::{ExitStatus, UartConsole};
 
 #[derive(Debug, StructOpt)]
 struct Opts {
@@ -22,13 +25,52 @@ struct Opts {
     timeout: Duration,
 }
 
+fn power_virus_systemtest(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    // Below is temporary until this test implements the command / response
+    // ujson framework.
+    let uart = transport.uart("console")?;
+    let mut console = UartConsole {
+        timeout: Some(opts.timeout),
+        exit_success: Some(Regex::new(r"PASS.*\n")?),
+        exit_failure: Some(Regex::new(r"(FAIL|FAULT).*\n")?),
+        newline: true,
+        ..Default::default()
+    };
+    let mut stdout = std::io::stdout();
+    let result = console.interact(&*uart, None, Some(&mut stdout))?;
+    match result {
+        ExitStatus::None | ExitStatus::CtrlC => Ok(()),
+        ExitStatus::Timeout => {
+            if console.exit_success.is_some() {
+                Err(anyhow!("Console timeout exceeded"))
+            } else {
+                Ok(())
+            }
+        }
+        ExitStatus::ExitSuccess => {
+            log::info!(
+                "ExitSuccess({:?})",
+                console.captures(result).unwrap().get(0).unwrap().as_str()
+            );
+            Ok(())
+        }
+        ExitStatus::ExitFailure => {
+            log::info!(
+                "ExitFailure({:?})",
+                console.captures(result).unwrap().get(0).unwrap().as_str()
+            );
+            Err(anyhow!("Matched exit_failure expression"))
+        }
+    }
+}
+
 fn main() -> Result<()> {
     let opts = Opts::from_args();
     opts.init.init_logging();
     let transport = opts.init.init_target()?;
-
     let uart = transport.uart("console")?;
     let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
 
+    execute_test!(power_virus_systemtest, &opts, &transport);
     Ok(())
 }