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1 | | -TODO: |
2 | | -validate clock toggle rate is 30hz and fix counters as needed |
3 | | -need phillips screws for the back |
4 | | -need more heat set inserts |
5 | | -need more 470/480 ohm 805 resistors |
6 | | - |
7 | | - |
8 | | - |
9 | | -https://forum.arduino.cc/t/samd21-power-consumption-too-high-in-active-mode/668966/2 |
10 | | - |
11 | | - |
12 | | -Generic clock generator 0 8 division factor bits - DIV[7:0] |
13 | | -Generic clock generator 1 16 division factor bits - DIV[15:0] |
14 | | -Generic clock generators 2 5 division factor bits - DIV[4:0] |
15 | | -Generic clock generators 3 - 8 8 division factor bits - DIV[7:0] |
16 | | - |
17 | | -rtc will be on anyways for time keeping |
18 | | - |
19 | | -add BOD33 disable in bootloader flashing scripts? |
20 | | - |
21 | | -condition where NVM RWS being 1 in bootloader will prevent startup below 2.1v |
22 | | -which is in theory near the end of useful battery life anyways |
23 | | - |
24 | | -add ability for poweroff requiring push button reset? |
25 | | -from system menu and for when battery is low |
26 | | -- how to do this? disable all clocks? |
27 | | - |
28 | | - |
29 | | -display says it operates down 2.7v |
30 | | -- max frame frequency of 65hz? |
31 | | -- claims EXTCOMIN should be below framerate frequency, does not indicate why |
32 | | -- extcom freq of 54-65hz |
33 | | - |
34 | | -3) A still image should be displayed less than two hours, if it is necessary to display still image longer than two |
35 | | -hour, display image data must be refreshed in order to avoid sticking image on LCD panel |
36 | | - |
37 | | -Memory LCDs do not generate this signal internally. It must be supplied using one of two methods: |
38 | | -software, or external clock... |
39 | | -When the software clock is selected [EXTMODE = L], bit V of the command bit string sets the state of VCOM. |
40 | | -See Figure 2. This bit must toggle (by writing to the panel) at least once per second. |
41 | | - |
42 | | -Power Scenario 1 |
43 | | -1hz write 1hz refresh |
44 | | -Here all of the pixels will be written to the panel once per second. For the 1.35-inch panel, the quiescent |
45 | | -current for the panel is 2.1μA. Each write to the panel (assuming that the entire panel is written), takes |
46 | | -360μA; and lasts for about 5.38ms (assuming a 2 MHz SPI clock speed). |
47 | | -If averaged over a second, this amounts to an “average” currant draw of approximately 2μa. Therefore, the |
48 | | -panel would have an average power draw of 20.5μW (5V operation). Note that a VCOM toggle can be done |
49 | | -whenever the panel is written to, including a data write. |
50 | | - |
51 | | -Power Scenario 2 |
52 | | -30 sec write, 1hz refresh |
53 | | -Here, we write all the pixels to the panel only every 30 seconds. The current required to write to the panel |
54 | | -“averaged” over that time is approximately 0.1μA. If VCOM is toggled once a second (using the Change |
55 | | -VCOM command), the additional power draw for this action (assuming that it is done 29 times) is an average |
56 | | -of 0.1μA. Therefore the average power draw over the 30-second period becomes 11.5μW. See Figure 10. |
57 | | -Applying these conditions to the 2.7-inch panel: writing all pixels to the whole panel once a second takes an |
58 | | -average of 485μW. Writing all pixels once every 30 seconds (with a 1-second VCOM toggle) takes 135μW. |
59 | | - |
60 | | - |
61 | | - |
62 | | - |
63 | | - uint32_t userWord0 = *((uint32_t *)NVMCTRL_USER); // Read fuses for user word 0 |
64 | | - uint32_t userWord1 = *((uint32_t *)(NVMCTRL_USER + 4)); // Read fuses for user word 1 |
65 | | - NVMCTRL->CTRLB.bit.CACHEDIS = 1; // Disable the cache |
66 | | - NVMCTRL->ADDR.reg = NVMCTRL_AUX0_ADDRESS / 2; // Set the address |
67 | | - NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMD_EAR | // Erase the auxiliary user page row |
68 | | - NVMCTRL_CTRLA_CMDEX_KEY; |
69 | | - while (!NVMCTRL->INTFLAG.bit.READY) // Wait for the NVM command to complete |
70 | | - NVMCTRL->STATUS.reg |= NVMCTRL_STATUS_MASK; // Clear the error flags |
71 | | - NVMCTRL->ADDR.reg = NVMCTRL_AUX0_ADDRESS / 2; // Set the address |
72 | | - NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMD_PBC | // Clear the page buffer |
73 | | - NVMCTRL_CTRLA_CMDEX_KEY; |
74 | | - while (!NVMCTRL->INTFLAG.bit.READY) // Wait for the NVM command to complete |
75 | | - NVMCTRL->STATUS.reg |= NVMCTRL_STATUS_MASK; // Clear the error flags |
76 | | - *((uint32_t *)NVMCTRL_USER) = userWord0 & ~FUSES_BOD33_EN_Msk; // Disable the BOD33 enable fuse in user word 0 |
77 | | - *((uint32_t *)(NVMCTRL_USER + 4)) = userWord1; // Copy back user word 1 unchanged |
78 | | - NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMD_WAP | // Write to the user page |
79 | | - NVMCTRL_CTRLA_CMDEX_KEY; |
80 | | - while (!NVMCTRL->INTFLAG.bit.READY) // Wait for the NVM command to complete |
81 | | - NVMCTRL->STATUS.reg |= NVMCTRL_STATUS_MASK; // Clear the error flags |
82 | | - NVMCTRL->CTRLB.bit.CACHEDIS = 0; // Enable the cache |
| 1 | +TODO: |
| 2 | +validate clock toggle rate is 30hz and fix counters as needed |
| 3 | +need phillips screws for the back |
| 4 | +need more heat set inserts |
| 5 | +need more 470/480 ohm 805 resistors |
| 6 | + |
| 7 | + |
| 8 | + |
| 9 | +https://forum.arduino.cc/t/samd21-power-consumption-too-high-in-active-mode/668966/2 |
| 10 | + |
| 11 | + |
| 12 | +Generic clock generator 0 8 division factor bits - DIV[7:0] |
| 13 | +Generic clock generator 1 16 division factor bits - DIV[15:0] |
| 14 | +Generic clock generators 2 5 division factor bits - DIV[4:0] |
| 15 | +Generic clock generators 3 - 8 8 division factor bits - DIV[7:0] |
| 16 | + |
| 17 | +rtc will be on anyways for time keeping |
| 18 | + |
| 19 | +add BOD33 disable in bootloader flashing scripts? |
| 20 | + |
| 21 | +condition where NVM RWS being 1 in bootloader will prevent startup below 2.1v |
| 22 | +which is in theory near the end of useful battery life anyways |
| 23 | + |
| 24 | +add ability for poweroff requiring push button reset? |
| 25 | +from system menu and for when battery is low |
| 26 | +- how to do this? disable all clocks? |
| 27 | + |
| 28 | + |
| 29 | +display says it operates down 2.7v |
| 30 | +- max frame frequency of 65hz? |
| 31 | +- claims EXTCOMIN should be below framerate frequency, does not indicate why |
| 32 | +- extcom freq of 54-65hz |
| 33 | + |
| 34 | +3) A still image should be displayed less than two hours, if it is necessary to display still image longer than two |
| 35 | +hour, display image data must be refreshed in order to avoid sticking image on LCD panel |
| 36 | + |
| 37 | +Memory LCDs do not generate this signal internally. It must be supplied using one of two methods: |
| 38 | +software, or external clock... |
| 39 | +When the software clock is selected [EXTMODE = L], bit V of the command bit string sets the state of VCOM. |
| 40 | +See Figure 2. This bit must toggle (by writing to the panel) at least once per second. |
| 41 | + |
| 42 | +Power Scenario 1 |
| 43 | +1hz write 1hz refresh |
| 44 | +Here all of the pixels will be written to the panel once per second. For the 1.35-inch panel, the quiescent |
| 45 | +current for the panel is 2.1μA. Each write to the panel (assuming that the entire panel is written), takes |
| 46 | +360μA; and lasts for about 5.38ms (assuming a 2 MHz SPI clock speed). |
| 47 | +If averaged over a second, this amounts to an “average” currant draw of approximately 2μa. Therefore, the |
| 48 | +panel would have an average power draw of 20.5μW (5V operation). Note that a VCOM toggle can be done |
| 49 | +whenever the panel is written to, including a data write. |
| 50 | + |
| 51 | +Power Scenario 2 |
| 52 | +30 sec write, 1hz refresh |
| 53 | +Here, we write all the pixels to the panel only every 30 seconds. The current required to write to the panel |
| 54 | +“averaged” over that time is approximately 0.1μA. If VCOM is toggled once a second (using the Change |
| 55 | +VCOM command), the additional power draw for this action (assuming that it is done 29 times) is an average |
| 56 | +of 0.1μA. Therefore the average power draw over the 30-second period becomes 11.5μW. See Figure 10. |
| 57 | +Applying these conditions to the 2.7-inch panel: writing all pixels to the whole panel once a second takes an |
| 58 | +average of 485μW. Writing all pixels once every 30 seconds (with a 1-second VCOM toggle) takes 135μW. |
| 59 | + |
| 60 | + |
| 61 | + |
| 62 | + |
| 63 | + uint32_t userWord0 = *((uint32_t *)NVMCTRL_USER); // Read fuses for user word 0 |
| 64 | + uint32_t userWord1 = *((uint32_t *)(NVMCTRL_USER + 4)); // Read fuses for user word 1 |
| 65 | + NVMCTRL->CTRLB.bit.CACHEDIS = 1; // Disable the cache |
| 66 | + NVMCTRL->ADDR.reg = NVMCTRL_AUX0_ADDRESS / 2; // Set the address |
| 67 | + NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMD_EAR | // Erase the auxiliary user page row |
| 68 | + NVMCTRL_CTRLA_CMDEX_KEY; |
| 69 | + while (!NVMCTRL->INTFLAG.bit.READY) // Wait for the NVM command to complete |
| 70 | + NVMCTRL->STATUS.reg |= NVMCTRL_STATUS_MASK; // Clear the error flags |
| 71 | + NVMCTRL->ADDR.reg = NVMCTRL_AUX0_ADDRESS / 2; // Set the address |
| 72 | + NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMD_PBC | // Clear the page buffer |
| 73 | + NVMCTRL_CTRLA_CMDEX_KEY; |
| 74 | + while (!NVMCTRL->INTFLAG.bit.READY) // Wait for the NVM command to complete |
| 75 | + NVMCTRL->STATUS.reg |= NVMCTRL_STATUS_MASK; // Clear the error flags |
| 76 | + *((uint32_t *)NVMCTRL_USER) = userWord0 & ~FUSES_BOD33_EN_Msk; // Disable the BOD33 enable fuse in user word 0 |
| 77 | + *((uint32_t *)(NVMCTRL_USER + 4)) = userWord1; // Copy back user word 1 unchanged |
| 78 | + NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMD_WAP | // Write to the user page |
| 79 | + NVMCTRL_CTRLA_CMDEX_KEY; |
| 80 | + while (!NVMCTRL->INTFLAG.bit.READY) // Wait for the NVM command to complete |
| 81 | + NVMCTRL->STATUS.reg |= NVMCTRL_STATUS_MASK; // Clear the error flags |
| 82 | + NVMCTRL->CTRLB.bit.CACHEDIS = 0; // Enable the cache |
| 83 | + |
| 84 | + |
| 85 | +pos 8, 5 bits |
| 86 | +pos 15, 2 bits |
| 87 | +pos 14, 1 bit |
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